diff options
| author | 2026-06-24 13:22:48 -0400 | |
|---|---|---|
| committer | 2026-06-24 13:22:48 -0400 | |
| commit | 2fca589444c29b383c00576fe46cf50cc3971cba (patch) | |
| tree | 5aa68ec86e5de426fdf2e57e165406b0bf1cfd75 /Shaders/sslr_resolve_no_dither.diff | |
| parent | 7cc4ce79e11f1b800dfc10f681d4e8c1198bc57b (diff) | |
| download | WorldTuningTool-2fca589444c29b383c00576fe46cf50cc3971cba.tar.gz WorldTuningTool-2fca589444c29b383c00576fe46cf50cc3971cba.tar.bz2 WorldTuningTool-2fca589444c29b383c00576fe46cf50cc3971cba.zip | |
Progress on full res SSR
Signed-off-by: Andrew Opalach <andrew@akon.city>
Diffstat (limited to 'Shaders/sslr_resolve_no_dither.diff')
| -rw-r--r-- | Shaders/sslr_resolve_no_dither.diff | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/Shaders/sslr_resolve_no_dither.diff b/Shaders/sslr_resolve_no_dither.diff new file mode 100644 index 0000000..756d85c --- /dev/null +++ b/Shaders/sslr_resolve_no_dither.diff @@ -0,0 +1,30 @@ +--- a/sslr_resolve_no_dither.asm 2026-06-24 10:47:30.333700495 -0400 ++++ b/sslr_resolve_no_dither.asm 2026-06-23 16:13:51.616100220 -0400 +@@ -202,14 +202,14 @@ + dcl_thread_group 16, 16, 1 + imad [precise(x)] r0.x, vThreadIDInGroup.y, l(16), vThreadIDInGroup.x + ishl [precise(yz)] r0.yz, vThreadGroupID.xxyx, l(0, 4, 4, 0) +-ushr [precise(yz)] r0.yz, r0.yyzy, l(0, 1, 1, 0) ++ushr [precise(yz)] r0.yz, r0.yyzy, l(0, 0, 0, 0) + iadd [precise(yz)] r0.yz, r0.yyzy, vThreadIDInGroup.xxyx + iadd [precise(xy)] r1.xy, r0.yzyy, l(-4, -4, 0, 0) +-ushr [precise(yz)] r0.yz, cb1[2].xxyx, l(0, 1, 1, 0) ++ushr [precise(yz)] r0.yz, cb1[2].xxyx, l(0, 0, 0, 0) + ige [precise(yz)] r0.yz, r1.xxyx, r0.yyzy + and [precise(y)] r0.y, r0.z, r0.y + iadd [precise(zw)] r0.zw, cb1[2].zzzw, cb1[2].xxxy +-ushr [precise(zw)] r0.zw, r0.zzzw, l(0, 0, 1, 1) ++ushr [precise(zw)] r0.zw, r0.zzzw, l(0, 0, 0, 0) + ilt [precise(zw)] r0.zw, r1.xxxy, r0.zzzw + and [precise(z)] r0.z, r0.w, r0.z + and [precise(y)] r0.y, r0.z, r0.y +@@ -361,8 +361,7 @@ + mul r1.w, r1.w, cb3[2].w + mul [precise(w)] r2.w, r2.x, r2.x + mul [precise(w)] r2.w, r2.w, l(0.500000) +- iadd [precise(xy)] r7.xy, vThreadIDInGroup.xyxx, l(8, 8, 0, 0) +- ushr [precise(xy)] r7.xy, r7.xyxx, l(1, 1, 0, 0) ++ mov [precise(xy)] r7.xy, vThreadIDInGroup.xyxx + imad [precise(w)] r3.w, r7.y, l(16), r7.x + ld_structured [precise] r7.xyzw, r3.w, l(0), g0.xyzw + and [precise(w)] r3.w, r7.w, l(0x80000000) |