diff options
Diffstat (limited to 'frontends/calculator/CEdev/lib/shared')
233 files changed, 14924 insertions, 0 deletions
diff --git a/frontends/calculator/CEdev/lib/shared/abort.src b/frontends/calculator/CEdev/lib/shared/abort.src new file mode 100644 index 0000000..b2d9648 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/abort.src @@ -0,0 +1,13 @@ +; --- +; triggers open debugger +; --- + + .def _abort + .ref __exit + .assume adl=1 + +_abort: + scf + sbc hl,hl + ld (hl),1 + jp __exit diff --git a/frontends/calculator/CEdev/lib/shared/abs.src b/frontends/calculator/CEdev/lib/shared/abs.src new file mode 100644 index 0000000..5dc8aa1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/abs.src @@ -0,0 +1,17 @@ + .def _abs + .assume adl=1 + +;int abs(int); + +_abs: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + sbc hl,de + ret p + ex de,hl + ret + diff --git a/frontends/calculator/CEdev/lib/shared/atoi.src b/frontends/calculator/CEdev/lib/shared/atoi.src new file mode 100644 index 0000000..2619388 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/atoi.src @@ -0,0 +1,22 @@ + .ref _strtol + .def _atoi + .assume adl=1 + +; int atoi(char *cp); + +_atoi: + pop bc + pop de + push de + push bc + ld bc,10 + push bc + ld c,b + push bc + push de + call _strtol + pop de + pop bc + pop bc + ret + diff --git a/frontends/calculator/CEdev/lib/shared/atol.src b/frontends/calculator/CEdev/lib/shared/atol.src new file mode 100644 index 0000000..7bf22d7 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/atol.src @@ -0,0 +1,8 @@ + .ref _atoi + .def _atol + .assume adl=1 + +; long atol(char *cp); + +_atol equ _atoi + diff --git a/frontends/calculator/CEdev/lib/shared/atomic_load_32.src b/frontends/calculator/CEdev/lib/shared/atomic_load_32.src new file mode 100644 index 0000000..a49df22 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/atomic_load_32.src @@ -0,0 +1,61 @@ +; --- +; uint32_t atomic_load_32(volatile uint32_t *p) +; --- + + .def _atomic_load_32 + .assume adl=1 + +_atomic_load_32: + pop hl + ex (sp),iy + push hl + ld c,0 +retry: +; Wait for a different (increasing) amount of time before each retry to prevent +; getting caught in an endless loop of the value changing between reads with a +; fixed period equal to the amount of time it takes for each retry + inc c + ld b,c +wait: + djnz wait +; Read the value twice. + lea hl,iy+3 + ; Time between first and last byte read: + ld de,(iy) ; 2R + ld a,(hl) ; + 1F+1R + cp a,(hl) ; + 1F+1R + ld hl,(iy) ; + 3F+3R + ; = 5F+7R + ; = 48cc (assuming F = R = 3) + ; = 1us (assuming 48MHz clock speed) + ; Don't need to worry about DMA, just + ; retry until not interrupted by DMA +; Retry if the values read differ. +; +; If the values differ, then the underlying value changed between reading the +; first byte of the first 32-bit read and the last byte of the second 32-bit +; read: +; * If a change occurs between the two 32-bit reads, then both values read +; remain valid. +; * If a change occurs in the middle of one of the 32-bit reads: +; * If the bytes already read change but the bytes yet to read do not +; change, then the value read is the valid value before the change. +; * If the bytes already read do not change but the yet still to read +; change, then the value read is the valid value after the change. +; * If the bytes already read and the bytes yet to read change, then the +; value read is an invalid mix of the values before and after the change. +; +; Without reading the value again, there is not enough information to determine +; if the third case occurred. If it did occur, then one of the values is +; invalid. But there is also not enough information to determine which is +; invalid, and therefore which is valid. So reading the value must be retried. +; +; (Furthermore, if a change occurs in the middle of both 32-bit reads and the +; bytes already read change in both, then both values read become invalid.) + jr nz,retry + sbc hl,de + jr nz,retry +; Values don't differ, good to go. + add hl,de + ld e,a ; euhl = value read + ret diff --git a/frontends/calculator/CEdev/lib/shared/atomic_load_decreasing_32.src b/frontends/calculator/CEdev/lib/shared/atomic_load_decreasing_32.src new file mode 100644 index 0000000..639eac1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/atomic_load_decreasing_32.src @@ -0,0 +1,89 @@ +; --- +; uint32_t atomic_load_decreasing_32(volatile uint32_t *p) +; --- + + .def _atomic_load_decreasing_32 + .assume adl=1 + +_atomic_load_decreasing_32: + pop hl + ex (sp),iy + push hl +; Temporarily disable interrupts. + ld a,i + di +; Read the value twice. +; first value read = cude, second value read = auhl + ; Time between first and last byte read: + ld de,(iy) ; 2R + ld c,(iy+3) ; + 3F+1R + ld hl,(iy) ; + 3F+3R + ld a,(iy+3) ; + 3F+1R + ; = 9F+7R + ; = 56cc (assuming F = R = 3) + ; ~ 1.17us (assuming 48MHz clock speed) + ; + approximate worst-case LCD + USB DMA + ; ~ 5us +; Re-enable interrupts if they were previously enabled. + jp po,no_ei + ei +no_ei: +; Compare and return the greater of the two values read. +; +; If the values differ, then the underlying value changed between reading the +; first byte of the first 32-bit read and the last byte of the second 32-bit +; read: +; * If a change occurs between the two 32-bit reads, then both values read +; remain valid. +; * If a change occurs in the middle of one of the 32-bit reads: +; * If the bytes already read change but the bytes yet to read do not +; change, then the value read is the valid value before the change. +; * If the bytes already read do not change but the yet still to read +; change, then the value read is the valid value after the change. +; * If the bytes already read and the bytes yet to read change, then the +; value read is an invalid mix of the values before and after the change. +; +; If the final case did not occur, then both values read are valid. +; +; If the final case occurred for only the second value read, then due to reading +; bytes in little-endian order, one to three upper bytes will reflect the +; decreased value after the change. Regardless of the lower bytes, the valid, +; first value read will be greater than the invalid, second value read. +; +; If the final case occurred for only the first value read, then due to reading +; bytes in little-endian order, one to three upper bytes will reflect the +; decreased value after the change, while the remaining one to three lower bytes +; will reflect the value before the change. If it is assumed that the value +; decreased by less than 256, then the upper bytes must have decreased through +; borrow and the lower bytes of the valid, second value read will be greater +; than the lower bytes of the invalid, first value read. And because the full +; second value read will reflect the the decreased value after the change, and +; therefore the two values read will only differ in the lower bytes, it follows +; that the full, valid, second valid read will be greater than the full, +; invalid, first value read. (Note that this assertion can be extended to +; include 256 because only one byte would change, making this whole case +; unreachable.) +; +; If the third case occurred for both values read, then both are invalid. There +; is no reasonable way to detect this, so it is assumed that this did not occur. +; +; Combining all of these cases and assumptions, the greater of the two values +; read will always be valid. + or a,a + sbc hl,de + sbc a,c ; auhl = second value read + ; - first value read + jr c,swap +; second value read >= first value read +; ==> second value read is valid + add hl,de + adc a,c + ld e,a ; euhl = second value read + ret + +swap: +; second value read < first value read +; ==> first value read is valid + ex de,hl + ld e,c ; euhl = first value read + ret diff --git a/frontends/calculator/CEdev/lib/shared/atomic_load_increasing_32.src b/frontends/calculator/CEdev/lib/shared/atomic_load_increasing_32.src new file mode 100644 index 0000000..d8c871f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/atomic_load_increasing_32.src @@ -0,0 +1,88 @@ +; --- +; uint32_t atomic_load_increasing_32(volatile uint32_t *p) +; --- + + .def _atomic_load_increasing_32 + .assume adl=1 + +_atomic_load_increasing_32: + pop hl + ex (sp),iy + push hl +; Temporarily disable interrupts. + ld a,i + di +; Read the value twice. +; first value read = cude, second value read = auhl + ; Time between first and last byte read: + ld de,(iy) ; 2R + ld c,(iy+3) ; + 3F+1R + ld hl,(iy) ; + 3F+3R + ld a,(iy+3) ; + 3F+1R + ; = 9F+7R + ; = 56cc (assuming F = R = 3) + ; ~ 1.17us (assuming 48MHz clock speed) + ; + approximate worst-case LCD + USB DMA + ; ~ 5us +; Re-enable interrupts if they were previously enabled. + jp po,no_ei + ei +no_ei: +; Compare and return the lesser of the two values read. +; +; If the values differ, then the underlying value changed between reading the +; first byte of the first 32-bit read and the last byte of the second 32-bit +; read: +; * If a change occurs between the two 32-bit reads, then both values read +; remain valid. +; * If a change occurs in the middle of one of the 32-bit reads: +; * If the bytes already read change but the bytes yet to read do not +; change, then the value read is the valid value before the change. +; * If the bytes already read do not change but the yet still to read +; change, then the value read is the valid value after the change. +; * If the bytes already read and the bytes yet to read change, then the +; value read is an invalid mix of the values before and after the change. +; +; If the final case did not occur, then both values read are valid. +; +; If the final case occurred for only the second value read, then due to reading +; bytes in little-endian order, one to three upper bytes will reflect the +; increased value after the change. Regardless of the lower bytes, the valid, +; first value read will be less than the invalid, second value read. +; +; If the final case occurred for only the first value read, then due to reading +; bytes in little-endian order, one to three upper bytes will reflect the +; increased value after the change, while the remaining one to three lower bytes +; will reflect the value before the change. If it is assumed that the value +; increased by less than 256, then the upper bytes must have increased through +; carry and the lower bytes of the valid, second value read will be less than +; the lower bytes of the invalid, first value read. And because the full second +; value read will reflect the the increased value after the change, and +; therefore the two values read will only differ in the lower bytes, it follows +; that the full, valid, second valid read will be less than the full, invalid, +; first value read. (Note that this assertion can be extended to include 256 +; because only one byte would change, making this whole case unreachable.) +; +; If the third case occurred for both values read, then both are invalid. There +; is no reasonable way to detect this, so it is assumed that this did not occur. +; +; Combining all of these cases and assumptions, the lesser of the two values +; read will always be valid. + or a,a + sbc hl,de + sbc a,c ; auhl = second value read + ; - first value read + jr c,no_swap +; second value read >= first value read +; ==> first value read is valid + ex de,hl + ld e,c ; euhl = first value read + ret + +no_swap: +; second value read < first value read +; ==> second value read is valid + add hl,de + adc a,c + ld e,a ; euhl = second value read + ret diff --git a/frontends/calculator/CEdev/lib/shared/atos.src b/frontends/calculator/CEdev/lib/shared/atos.src new file mode 100644 index 0000000..cb3403b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/atos.src @@ -0,0 +1,8 @@ + .ref _atoi + .def _atos + .assume adl=1 + +; short int atos(char *cp); + +_atos equ _atoi + diff --git a/frontends/calculator/CEdev/lib/shared/bdivs.src b/frontends/calculator/CEdev/lib/shared/bdivs.src new file mode 100644 index 0000000..1bd30b8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bdivs.src @@ -0,0 +1,44 @@ +; (c) Copyright 2001-2008 Zilog Inc. +;------------------------------------------------------------------------- +; Signed Byte Division. +; Input: +; Operand1: +; B : 8 bit dividend (numerator) +; +; Operand2: +; C : 8 bit divisor (denominator) +; +; Output: +; Result: A : 8 bit quotient +; Registers Used: +; d, e +;------------------------------------------------------------------------- + .ref __bdivu + .def __bdivs + .assume adl=1 + +__bdivs: + push bc + xor a,a + sub a,b + jp m,_L0 + ld b,a +_L0: + xor a,a + sub a,c + jp m,_L1 + ld c,a +_L1: + call __bdivu + pop bc + push hl + ld l,a + ld a,b + xor a,c + ld a,l + jp p,_L2 + neg +_L2: + pop hl + ret + diff --git a/frontends/calculator/CEdev/lib/shared/bdivu.src b/frontends/calculator/CEdev/lib/shared/bdivu.src new file mode 100644 index 0000000..cd2b7d3 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bdivu.src @@ -0,0 +1,41 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Byte Division. +; Input: +; Operand1: +; B : 8 bit dividend (numerator x) +; +; Operand2: +; C : 8 bit divisor (denominator y) +; +; Output: +; Result: A : 8 bit quotient +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __bdivu + .assume adl=1 + +__bdivu: + push bc + push hl + ld h,b + xor a,a + ld b,8 ;i = 8 (bit counter) +loop: + sla h + rla + jr c,over + cp a,c + jr c,under +over: + sub a,c + inc h +under: + djnz loop + + ld a,h + pop hl + pop bc + ret + diff --git a/frontends/calculator/CEdev/lib/shared/bldix.src b/frontends/calculator/CEdev/lib/shared/bldix.src new file mode 100644 index 0000000..6d3dbf7 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bldix.src @@ -0,0 +1,25 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; byte load a,(ix+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from ix +; +; Output: +; Result: A : 8 bit +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __bldix + .assume adl=1 + +__bldix: + push ix + push af ; Preserve flags + add ix,bc + pop af ; Restore flags + ld a,(ix) + pop ix + ret + diff --git a/frontends/calculator/CEdev/lib/shared/bldiy.src b/frontends/calculator/CEdev/lib/shared/bldiy.src new file mode 100644 index 0000000..acda08a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bldiy.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; byte load a,(iy+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from iy +; +; Output: +; Result: A : 8 bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __bldiy + .assume adl=1 + +__bldiy equ 0000FCh diff --git a/frontends/calculator/CEdev/lib/shared/bmuls.src b/frontends/calculator/CEdev/lib/shared/bmuls.src new file mode 100644 index 0000000..45d7111 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bmuls.src @@ -0,0 +1,25 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Signed Byte Multiply +; Input: +; Operand1: +; A : 8 bit +; +; Operand2: +; B : 8 bit +; +; Output: +; Result: A : 8 bit product +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __bmuls + .assume adl=1 + +__bmuls: + push bc + ld c,a + mlt bc + ld a,c + pop bc + ret diff --git a/frontends/calculator/CEdev/lib/shared/bmulu.src b/frontends/calculator/CEdev/lib/shared/bmulu.src new file mode 100644 index 0000000..20c27b5 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bmulu.src @@ -0,0 +1,24 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Byte Multiply +; Input: +; Operand1: +; B : 8 bit +; +; Operand2: +; C : 8 bit +; +; Output: +; Result: A : 8 bit product +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __bmulu + .assume adl=1 + +__bmulu: + push bc + mlt bc + ld a,c + pop bc + ret diff --git a/frontends/calculator/CEdev/lib/shared/brems.src b/frontends/calculator/CEdev/lib/shared/brems.src new file mode 100644 index 0000000..3687ced --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/brems.src @@ -0,0 +1,40 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Signed Byte Modulus +; Input: +; Operand1: +; A : 8 bit dividend (numerator) +; +; Operand2: +; C : 8 bit divisor (denominator) +; +; Output: +; Result: A : 8 bit modulus +; Registers Used: +; +;------------------------------------------------------------------------- + .ref __bremu + .def __brems + .assume adl=1 + +__brems: + push bc + ld b,a + bit 7,c + jr z,skip1 + ld a,c + neg + ld c,a +skip1: + ld a,b + bit 7,a + jr z,skip2 + neg +skip2: + call __bremu + bit 7,b + jr z,skip3 + neg +skip3: + pop bc + ret diff --git a/frontends/calculator/CEdev/lib/shared/bremu.src b/frontends/calculator/CEdev/lib/shared/bremu.src new file mode 100644 index 0000000..4c60bc8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bremu.src @@ -0,0 +1,39 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Byte Modulus +; Input: +; Operand1: +; A : 8 bit dividend (numerator) +; +; Operand2: +; C : 8 bit divisor (denominator) +; +; Output: +; Result: A : 8 bit modulus +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __bremu + .assume adl=1 + +__bremu: + push bc + push hl + ld h,a + xor a,a + ld b,8 +loop: + sla h + rla + jr c,over + cp a,c + jr c,under +over: + sub a,c + inc h +under: + djnz loop + pop hl + pop bc + ret + diff --git a/frontends/calculator/CEdev/lib/shared/bsearch.src b/frontends/calculator/CEdev/lib/shared/bsearch.src new file mode 100644 index 0000000..6ec3acc --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bsearch.src @@ -0,0 +1,195 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\BSEARCH.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2008 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /************************************************************************/
+; 9 #include <stddef.h>
+; 10 #include <stdlib.h>
+; 11
+; 12 /*************************************************
+; 13 *
+; 14 * bsearch - binary search
+; 15 *
+; 16 * Inputs:
+; 17 * key - key to search for
+; 18 * base - base of array to be sorted
+; 19 * num - number of elements
+; 20 * width - size of each element
+; 21 * comp - pointer to function for comparison
+; 22 *
+; 23 * Returns:
+; 24 * nothing
+; 25 *
+; 26 *************************************************/
+; 27 void *bsearch(char *key,
+; 28 char *base,
+; 29 size_t num,
+; 30 size_t width,
+; 31 int (*comp)(void *,void *))
+; 32 {
+_bsearch:
+ LD HL,-18
+ CALL __frameset
+; 33 unsigned int mid;
+; 34 unsigned int low;
+; 35 unsigned int high;
+; 36 int d;
+; 37 unsigned int pmid;
+; 38 char *addr;
+; 39
+; 40 /* make high the nearest power of two for */
+; 41 /* efficiency and to ensure we always */
+; 42 /* terminate properly. */
+; 43 /* Note that high is always higher */
+; 44 /* than it should be so that we will */
+; 45 /* not fail to find the last entry in the */
+; 46 /* table. */
+; 47
+; 48 high = 0x0001;
+ LD BC,1
+ LD (IX+-6),BC
+; 49 while (high <= num)
+ JR L_0
+L_1:
+; 50 high <<= 1;
+ LD HL,(IX+-6)
+ ADD HL,HL
+ LD (IX+-6),HL
+L_0:
+ LD BC,(IX+-6)
+ LD HL,(IX+12)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_1
+; 51 low = 0;
+ LD BC,0
+ LD (IX+-9),BC
+; 52 mid = 0;
+ LD (IX+-3),BC
+; 53
+; 54 /* begin the search */
+; 55
+; 56 for(;;) {
+L_11:
+; 57 pmid = mid;
+ LD BC,(IX+-3)
+ LD (IX+-18),BC
+; 58 mid = ((high - low) >> 1) + low;
+ LD BC,(IX+-9)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ LD A,1
+ CALL __ishru_b
+ LD BC,(IX+-9)
+ ADD HL,BC
+ LD (IX+-3),HL
+; 59
+; 60 if (pmid == mid) /* terminate because we're */
+ LD BC,HL
+ LD HL,(IX+-18)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_5
+ OR A,A
+; 61 return(NULL); /* oscilating. */
+ SBC HL,HL
+ JR L_13
+L_5:
+; 62
+; 63 if (mid >= num) { /* we're above the array. */
+ LD BC,(IX+12)
+ LD HL,(IX+-3)
+ OR A,A
+ SBC HL,BC
+ JR C,L_6
+; 64 high = mid; /* pretend element is larger*/
+ LD BC,(IX+-3)
+ LD (IX+-6),BC
+; 65 continue; /* than the key. */
+ JR L_11
+; 66 }
+L_6:
+; 67
+; 68 d = (*comp)(key,addr = base + mid * width);
+ LD HL,(IX+-3)
+ LD BC,(IX+15)
+ CALL __imulu
+ LD BC,(IX+9)
+ ADD HL,BC
+ LD (IX+-15),HL
+ LD IY,(IX+18)
+ LD BC,HL
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __indcall
+ POP BC
+ POP BC
+ LD (IX+-12),HL
+; 69 if (d == 0) /* we found it */
+ CALL __icmpzero
+ JR NZ,L_10
+; 70 return(addr);
+ LD HL,(IX+-15)
+ JR L_13
+L_10:
+; 71 if (d < 0) /* key is less than mid, */
+ LD HL,(IX+-12)
+ CALL __icmpzero
+ CALL __setflag
+ JP P,L_9
+; 72 high = mid; /* set high to mid. */
+ LD BC,(IX+-3)
+ LD (IX+-6),BC
+; 73 else /* key is greater than mid, */
+ JR L_11
+L_9:
+; 74 low = mid; /* set low to mid. */
+ LD BC,(IX+-3)
+ LD (IX+-9),BC
+; 75 }
+ JR L_11
+; 76 }
+L_13:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _bsearch ***************************
+;Name Addr/Register Size Type
+;pmid IX-18 3 variable
+;addr IX-15 3 variable
+;d IX-12 3 variable
+;low IX-9 3 variable
+;high IX-6 3 variable
+;mid IX-3 3 variable
+;comp IX+18 3 parameter
+;width IX+15 3 parameter
+;num IX+12 3 parameter
+;base IX+9 3 parameter
+;key IX+6 3 parameter
+
+
+; Stack Frame Size: 39 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __indcall:ROM
+ XREF __imulu:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XREF __icmpzero:ROM
+ XREF __ishru_b:ROM
+ XDEF _bsearch
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/bshl.src b/frontends/calculator/CEdev/lib/shared/bshl.src new file mode 100644 index 0000000..9c6c14b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bshl.src @@ -0,0 +1,18 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Byte Shift Left +; Input: +; Operand1: +; A : 8 bit number to shift +; Operand2: +; B : 8 bit shift count +; +; Output: +; Result: A : 8 bit +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __bshl + .assume adl=1 + +__bshl equ 000100h diff --git a/frontends/calculator/CEdev/lib/shared/bshrs.src b/frontends/calculator/CEdev/lib/shared/bshrs.src new file mode 100644 index 0000000..4c53262 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bshrs.src @@ -0,0 +1,29 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Byte Shift Right Signed +; Input: +; Operand1: +; A : 8 bit number to shift +; Operand2: +; B : 8 bit shift count +; +; Output: +; Result: A : 8 bit +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __bshrs + .assume adl=1 + +__bshrs: + push bc + inc b + jr test + +loop: + sra a +test: + djnz loop + + pop bc + ret diff --git a/frontends/calculator/CEdev/lib/shared/bshru.src b/frontends/calculator/CEdev/lib/shared/bshru.src new file mode 100644 index 0000000..ec73588 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bshru.src @@ -0,0 +1,18 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Byte Shift Right Unsigned +; Input: +; Operand1: +; A : 8 bit number to shift +; Operand2: +; B : 8 bit shift count +; +; Output: +; Result: A : 8 bit +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __bshru + .assume adl=1 + +__bshru equ 000104h diff --git a/frontends/calculator/CEdev/lib/shared/bstix.src b/frontends/calculator/CEdev/lib/shared/bstix.src new file mode 100644 index 0000000..3719b30 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bstix.src @@ -0,0 +1,19 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; byte store (ix+nnnnnn),A +; Input: +; Operand1: +; BC : 24-bit offset from ix +; A : 8-bit integer to store +; +; Output: +; none +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __bstix + .assume adl=1 + +__bstix equ 00010Ch + diff --git a/frontends/calculator/CEdev/lib/shared/bstiy.src b/frontends/calculator/CEdev/lib/shared/bstiy.src new file mode 100644 index 0000000..b95ce91 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/bstiy.src @@ -0,0 +1,18 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; byte store (iy+nnnnnn),A +; Input: +; Operand1: +; BC : 24-bit offset from iy +; A : 8-bit integer to store +; +; Output: +; +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __bstiy + .assume adl=1 + +__bstiy equ 000108h diff --git a/frontends/calculator/CEdev/lib/shared/calloc.src b/frontends/calculator/CEdev/lib/shared/calloc.src new file mode 100644 index 0000000..069e4bf --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/calloc.src @@ -0,0 +1,27 @@ + .ref __imulu + .ref _malloc + .ref _memset + .def _calloc + .assume adl=1 + +_calloc: + pop de + pop bc + pop hl + push hl + push bc + push de + call __imulu + push hl + call _malloc + add hl,de + xor a,a + sbc hl,de + ld e,a + push de + push hl + call nz,_memset + pop hl + pop de + pop bc + ret diff --git a/frontends/calculator/CEdev/lib/shared/case.src b/frontends/calculator/CEdev/lib/shared/case.src new file mode 100644 index 0000000..26919eb --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case.src @@ -0,0 +1,27 @@ +; (c) Copyright 2001-2008 Zilog Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand1: +; bc : 24 bit address of CASE TABLE +; +; Operand2: +; de : 24 bit number of entries in table +; +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; Result: hl : 24 bit address of case jp to take +; Registers Used: +; +; +; Table Format: +; [24-bit value][JP label (4-bytes)] 7 bytes total +; +;------------------------------------------------------------------------- + .def __case + .assume adl=1 + +__case equ 000110h diff --git a/frontends/calculator/CEdev/lib/shared/case16.src b/frontends/calculator/CEdev/lib/shared/case16.src new file mode 100644 index 0000000..33cb5cc --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case16.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __case16 + .assume adl=1 + +__case16 equ 000114h diff --git a/frontends/calculator/CEdev/lib/shared/case16d.src b/frontends/calculator/CEdev/lib/shared/case16d.src new file mode 100644 index 0000000..f2a929d --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case16d.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; Result: hl : 24 bit address of case jp to take +; Registers Used: +; +;------------------------------------------------------------------------- + .def __case16D + .assume adl=1 + +__case16D equ 000118h diff --git a/frontends/calculator/CEdev/lib/shared/case24.src b/frontends/calculator/CEdev/lib/shared/case24.src new file mode 100644 index 0000000..43539e5 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case24.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __case24 + .assume adl=1 + +__case24 equ 00011Ch diff --git a/frontends/calculator/CEdev/lib/shared/case24d.src b/frontends/calculator/CEdev/lib/shared/case24d.src new file mode 100644 index 0000000..bdec1ac --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case24d.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; Result: hl : 24 bit address of case jp to take +; Registers Used: +; +;------------------------------------------------------------------------- + .def __case24D + .assume adl=1 + +__case24D equ 000120h diff --git a/frontends/calculator/CEdev/lib/shared/case8.src b/frontends/calculator/CEdev/lib/shared/case8.src new file mode 100644 index 0000000..8d4f00f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case8.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __case8 + .assume adl=1 + +__case8 equ 000124h diff --git a/frontends/calculator/CEdev/lib/shared/case8d.src b/frontends/calculator/CEdev/lib/shared/case8d.src new file mode 100644 index 0000000..f4be7a6 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/case8d.src @@ -0,0 +1,17 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; Result: hl : 24 bit address of case jp to take +; Registers Used: +; +;------------------------------------------------------------------------- + .def __case8D + .assume adl=1 + +__case8D equ 000128h diff --git a/frontends/calculator/CEdev/lib/shared/debugger.src b/frontends/calculator/CEdev/lib/shared/debugger.src new file mode 100644 index 0000000..684b3a2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/debugger.src @@ -0,0 +1,12 @@ +; --- +; opens the debugger +; --- + + .def _dbg_Debugger + .assume adl=1 + +_dbg_Debugger: + scf + sbc hl,hl + ld (hl),2 + ret diff --git a/frontends/calculator/CEdev/lib/shared/delay.src b/frontends/calculator/CEdev/lib/shared/delay.src new file mode 100644 index 0000000..62978b8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/delay.src @@ -0,0 +1,92 @@ + +; --- +; void delay(uint16_t millis) +; --- + + .def _delay + .assume adl=1 + +mpTmrRange equ 0F20000h + +tmr2Counter equ 10h +tmr2Load equ 14h +tmr2Match1 equ 18h +tmr2Match2 equ 1Ch + +tmrCtrl equ 30h + +bTmr2Enable equ 3 +bTmr2Crystal equ 4 +bTmr2Overflow equ 5 +bTmr2CountUp equ 10 + +_delay: +; Read argument. + pop de + ex (sp),hl ; 0hl = millis + push de +; Abort ASAP if millis == 0. + ld a,h + or a,l + ret z +; Convert millis to CPU cycles by multiplying by 48000. +; Subtract 2 to offset overhead and the unknown counter low byte. + ld b,h + ld c,l ; 0bc = millis + dec.s bc ; bc = millis-1; need to set bcu = 0 + srl b + rr c ; bc = (millis-1)>>1 + ; = millis*(48000&0FFh)>>8, + ; off by -1 or -0.5 + ld e,l + ld d,187 ; 48000/256 == 187.5 + ld l,d + mlt de ; de = (millis&0FFh)*(48000>>8) + mlt hl ; hl = (millis>>8)*(48000>>8) + dec hl + push hl + dec sp + pop hl + inc sp + ld l,-2 ; hl = (millis&0FF00h)*(48000>>8)-2 + add hl,de ; hl = millis*(48000>>8)-2 + add hl,bc ; hl ~ (millis*48000>>8)-3 +; Set up timer 2 control bits: disabled, CPU clock, no interrupt, count down. + ex de,hl ; de ~ (millis*48000>>8)-3 + ld hl,mpTmrRange+tmrCtrl + res bTmr2Enable,(hl) + res bTmr2Crystal,(hl) + res bTmr2Overflow,(hl) + inc hl + res bTmr2CountUp-8,(hl) +; Set up timer 2 counter, match, and reload values. + ld l,tmr2Counter+1 + ld (hl),de ; counter = millis*48000-768+0xxh + ld l,tmr2Match1+3 + ld (hl),0FFh ; match1 = 0FFxxxxxxh + ld l,tmr2Match2+3 + ld (hl),0FFh ; match2 = 0FFxxxxxxh + ld l,tmr2Load+3 + ld (hl),0FEh ; reload = 0FExxxxxxh +; Enable timer 2. + ld l,tmrCtrl + set bTmr2Enable,(hl) +; Wait until timer 2 expires (underflows). +; Will catch the underflow if not interrupted for a continuous period of +; ((254-188)<<24)/48000000 ~ 23.1s. + ld l,tmr2Counter+3 + ld a,188 ; = 1+((0FFFFh*24000 shl 1)-12 shr 24) +; 380 cc up to this point +_delay_wait: + cp a,(hl) + jr nc,_delay_wait +; 12-29 cc to exit waitloop +; Done. + ret +; ~421 cc up to this point +; caller overhead: +; ld bc,millis +; push bc +; call _delay +; pop bc +; ~485 cc total diff --git a/frontends/calculator/CEdev/lib/shared/div.src b/frontends/calculator/CEdev/lib/shared/div.src new file mode 100644 index 0000000..0ae3c0d --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/div.src @@ -0,0 +1,54 @@ +; Copyright 1992-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Div function +; +; div_t div(int numer,int denom); +; +;------------------------------------------------------------------------- + .def _div + .ref __idivs + .ref __irems + .assume adl=1 + +_div: + push af + push bc + push hl + push de + + ld hl,21 + add hl,sp + ld bc,(hl) ; bc=val of denominator + dec hl + dec hl + dec hl + ld hl,(hl) ; hl=val of numerator + push hl + call __idivs + ex de,hl ; de= quotient + pop hl ; hl=val of numerator + call __irems + ld bc,hl + + ld hl,15 + add hl,sp + ld hl,(hl) + inc hl + inc hl + inc hl + ld (hl),bc ; remainder + dec hl + dec hl + dec hl + ld (hl),de ;quotient + + pop de + pop bc + pop bc + pop af + + ret + + + + diff --git a/frontends/calculator/CEdev/lib/shared/dzx7_standard.src b/frontends/calculator/CEdev/lib/shared/dzx7_standard.src new file mode 100644 index 0000000..a3591a2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/dzx7_standard.src @@ -0,0 +1,106 @@ +; --- +; void dzx7_turbo(void *src, void *dst) +; --- +; Dec 2012 by Einar Saukas & Urusergi +; "Standard" version (70 bytes) +; --- + + .def _dzx7_Standard + .assume adl=1 + +; enter : hl = void *src +; de = void *dst +; +; exit : hl = & following uncompressed block +; +; uses : af, bc, de, hl + +_dzx7_Standard: + pop bc + pop hl + pop de + push de + push hl + push bc + + ld a, 128 + +dzx7s_copy_byte_loop: + + ldi ; copy literal byte + +dzx7s_main_loop: + + call dzx7s_next_bit + jr nc, dzx7s_copy_byte_loop ; next bit indicates either literal or sequence + +; determine number of bits used for length (Elias gamma coding) + + push de + ld de, 0 + ld bc, 0 + +dzx7s_len_size_loop: + + inc d + call dzx7s_next_bit + jr nc, dzx7s_len_size_loop + +; determine length + +dzx7s_len_value_loop: + + call nc, dzx7s_next_bit + rl c + rl b + jr c, dzx7s_exit ; check end marker + dec d + jr nz, dzx7s_len_value_loop + inc bc ; adjust length + +; determine offset + + ld e, (hl) ; load offset flag (1 bit) + offset value (7 bits) + inc hl + + sla e + inc e + + jr nc, dzx7s_offset_end ; if offset flag is set, load 4 extra bits + ld d, 16 ; bit marker to load 4 bits + +dzx7s_rld_next_bit: + + call dzx7s_next_bit + rl d ; insert next bit into D + jr nc, dzx7s_rld_next_bit ; repeat 4 times, until bit marker is out + inc d ; add 128 to DE + srl d ; retrieve fourth bit from D + +dzx7s_offset_end: + + rr e ; insert fourth bit into E + +; copy previous sequence + + ex (sp), hl ; store source, restore destination + push hl ; store destination + sbc hl, de ; HL = destination - offset - 1 + pop de ; DE = destination + ldir + +dzx7s_exit: + + pop hl ; restore source address (compressed data) + jr nc, dzx7s_main_loop + +dzx7s_next_bit: + + add a, a ; check next bit + ret nz ; no more bits left? + ld a, (hl) ; load another group of 8 bits + inc hl + rla + ret + + end diff --git a/frontends/calculator/CEdev/lib/shared/dzx7_turbo.src b/frontends/calculator/CEdev/lib/shared/dzx7_turbo.src new file mode 100644 index 0000000..15a6236 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/dzx7_turbo.src @@ -0,0 +1,117 @@ +; --- +; void dzx7_turbo(void *src, void *dst) +; --- +; Dec 2012 by Einar Saukas & Urusergi +; "Turbo" version (89 bytes, 25% faster) +; --- + + .def _dzx7_Turbo + .assume adl=1 + +; enter : hl = void *src +; de = void *dst +; +; exit : hl = & following uncompressed block +; +; uses : af, bc, de, hl + +_dzx7_Turbo: + pop bc + pop hl + pop de + push de + push hl + push bc + + ld a, 128 + +dzx7t_copy_byte_loop: + + ldi ; copy literal byte + +dzx7t_main_loop: + + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + jr nc, dzx7t_copy_byte_loop ; next bit indicates either literal or sequence + +; determine number of bits used for length (Elias gamma coding) + + push de + ld de, 0 + ld bc, 1 + +dzx7t_len_size_loop: + + inc d + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + jr nc, dzx7t_len_size_loop + jp dzx7t_len_value_start + +; determine length + +dzx7t_len_value_loop: + + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + rl c + rl b + jr c, dzx7t_exit ; check end marker + +dzx7t_len_value_start: + + dec d + jr nz, dzx7t_len_value_loop + inc bc ; adjust length + +; determine offset + + ld e, (hl) ; load offset flag (1 bit) + offset value (7 bits) + inc hl + + sla e + inc e + + jr nc, dzx7t_offset_end ; if offset flag is set, load 4 extra bits + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + rl d ; insert first bit into D + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + rl d ; insert second bit into D + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + rl d ; insert third bit into D + add a, a ; check next bit + call z, dzx7t_load_bits ; no more bits left? + ccf + jr c, dzx7t_offset_end + inc d ; equivalent to adding 128 to DE + +dzx7t_offset_end: + + rr e ; insert inverted fourth bit into E + +; copy previous sequence + + ex (sp), hl ; store source, restore destination + push hl ; store destination + sbc hl, de ; HL = destination - offset - 1 + pop de ; DE = destination + ldir + +dzx7t_exit: + + pop hl ; restore source address (compressed data) + jp nc, dzx7t_main_loop + +dzx7t_load_bits: + + ld a, (hl) ; load another group of 8 bits + inc hl + rla + ret + + + end diff --git a/frontends/calculator/CEdev/lib/shared/finite.src b/frontends/calculator/CEdev/lib/shared/finite.src new file mode 100644 index 0000000..35c8c5c --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/finite.src @@ -0,0 +1,19 @@ + .def _finite + .assume adl=1 + +; int finite(double n); + +_finite: + pop bc + pop hl + pop de + push de + push hl + push bc + add hl,hl + ld a,e + rla + add a,1 + sbc hl,hl + inc hl + ret diff --git a/frontends/calculator/CEdev/lib/shared/fpadd.src b/frontends/calculator/CEdev/lib/shared/fpadd.src new file mode 100644 index 0000000..238ee39 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpadd.src @@ -0,0 +1,25 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; IEEE Single precision add +; +; INPUTS: AuBC OP1. +; EuHL OP2. +; +; OUTPUTS: AuBC Sum. +; +; Returns the result of adding the absolute values of the single-precision +; floating-point values OP1 and OP2. If Sign of result is 1, the sum is +; negated before being returned. +; +;-------------------------------------------------------------- + .def __fadd + .assume adl=1 + +__fadd equ 000270h diff --git a/frontends/calculator/CEdev/lib/shared/fpcmp.src b/frontends/calculator/CEdev/lib/shared/fpcmp.src new file mode 100644 index 0000000..acfbce0 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpcmp.src @@ -0,0 +1,27 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; IEEE Single precision compare. +; +; INPUTS: +; +; Operand1: +; EuHL : 32 bit IEEE format +; +; Operand2: +; AuBC : 32 bit IEEE format +; +; +; OUTPUTS: FLAGS based on Op1 - Op2 +; +;-------------------------------------------------------------- + .def __fcmp + .assume adl=1 + +__fcmp equ 000274h diff --git a/frontends/calculator/CEdev/lib/shared/fpdata.src b/frontends/calculator/CEdev/lib/shared/fpdata.src new file mode 100644 index 0000000..e34a653 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpdata.src @@ -0,0 +1,17 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\FPDATA.C"
+ .assume ADL=1
+ SEGMENT DATA
+__huge_val:
+ DF 3.40282347E+38
+ XDEF __huge_val
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5 #include <float.h>
+; 6
+; 7 double _huge_val = LDBL_MAX;
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/fpdiv.src b/frontends/calculator/CEdev/lib/shared/fpdiv.src new file mode 100644 index 0000000..ab80d15 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpdiv.src @@ -0,0 +1,28 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; IEEE Single precision division +; +; INPUTS: +; Operand1: +; AuBC : 32 bit IEEE format +; +; Operand2: +; EuHL : 32 bit IEEE format divisor +; +; OUTPUTS: +; Result: AuBC : 32 bit IEEE Quotient. +; Registers Used: +; flags +; +;-------------------------------------------------------------- + .def __fdiv + .assume adl=1 + +__fdiv equ 000278h diff --git a/frontends/calculator/CEdev/lib/shared/fpftol.src b/frontends/calculator/CEdev/lib/shared/fpftol.src new file mode 100644 index 0000000..bc4e01e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpftol.src @@ -0,0 +1,20 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; IEEE Single precision to long. +; +; INPUTS: abc: 32-bit IEEE Single precision. +; +; OUTPUTS: abc: 32-bit signed long. +; +;-------------------------------------------------------------- + .def __ftol + .assume adl=1 + +__ftol equ 00027Ch diff --git a/frontends/calculator/CEdev/lib/shared/fpltof.src b/frontends/calculator/CEdev/lib/shared/fpltof.src new file mode 100644 index 0000000..ba2e70f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpltof.src @@ -0,0 +1,20 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; Signed long to IEEE Single precision. +; +; INPUTS: AuBC 32-bit signed long. +; +; OUTPUTS: AuBC 32-bit IEEE Single precision. +; +;-------------------------------------------------------------- + .def __ltof + .assume adl=1 + +__ltof equ 000284h diff --git a/frontends/calculator/CEdev/lib/shared/fpmul.src b/frontends/calculator/CEdev/lib/shared/fpmul.src new file mode 100644 index 0000000..7b59483 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpmul.src @@ -0,0 +1,26 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;------------------------------------------------------------------------- +; IEEE Single precision multiply +; Input: +; Operand1: +; AuBC : 32 bit +; +; Operand2: +; EuHL : 32 bit +; +; Output: +; Result: AuBC : 32 bit +; Registers Used: +; flags +; +;------------------------------------------------------------------------- + .def __fmul + .assume adl=1 + +__fmul equ 000288h diff --git a/frontends/calculator/CEdev/lib/shared/fpneg.src b/frontends/calculator/CEdev/lib/shared/fpneg.src new file mode 100644 index 0000000..9de1421 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpneg.src @@ -0,0 +1,32 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; IEEE Negate. +; +; INPUTS: +; AuBC: 32-bit IEEE Single Precision. +; +; OUTPUTS: +; AuBC: 32-bit IEEE Single Precision. +; +;-------------------------------------------------------------- + .def __fneg + .assume adl=1 + +__fneg: + or a,a + jr nz,__noexit + push hl + sbc hl,hl + sbc hl,bc + pop hl + ret z +__noexit: + xor a,80h + ret diff --git a/frontends/calculator/CEdev/lib/shared/fppack.src b/frontends/calculator/CEdev/lib/shared/fppack.src new file mode 100644 index 0000000..fe14285 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fppack.src @@ -0,0 +1,28 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; Pack IEEE operand of dyadic operations. +; +; INPUTS: +; AuBC: 2s-comp mantissa+fraction (9+23 bit) +; E: Exponent. +; D: Sign. +; +; OUTPUTS: AuBC: 32 bit IEEE float. +; +; A AAAAAAB BBBBBBBBBBBBBBCCCCCCCCC +; S EEEEEEE FFFFFFFFFFFFFFFFFFFFFFF +; 0 1 8 9 31 +; MODIFIES: +; flags +;-------------------------------------------------------------- + .def __fppack + .assume adl=1 + +__fppack equ 00026Ch diff --git a/frontends/calculator/CEdev/lib/shared/fpsub.src b/frontends/calculator/CEdev/lib/shared/fpsub.src new file mode 100644 index 0000000..daaf034 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpsub.src @@ -0,0 +1,27 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; IEEE Single precision sub +; Input: +; Operand1: +; abc : 32 bit IEEE single precision +; +; Operand2: +; ehl : 32 bit IEEE single precision +; +; Output: +; Result: abc : 32 bit IEEE single precision (abc - ehl) +; Registers Used: + +;------------------------------------------------------------------------- + .def __fsub + .ref __fadd + .assume adl=1 + +__fsub equ 000290h diff --git a/frontends/calculator/CEdev/lib/shared/fpultof.src b/frontends/calculator/CEdev/lib/shared/fpultof.src new file mode 100644 index 0000000..45fe5f4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpultof.src @@ -0,0 +1,22 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; Unsigned long to IEEE Single precision. +; +; INPUTS: +; abc: 32-bit unsigned long +; +; OUTPUTS: +; abc: IEEE Single precision. +; +;-------------------------------------------------------------- + .def __ultof + .assume adl=1 + +__ultof equ 000280h diff --git a/frontends/calculator/CEdev/lib/shared/fpupop1.src b/frontends/calculator/CEdev/lib/shared/fpupop1.src new file mode 100644 index 0000000..4a7064f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpupop1.src @@ -0,0 +1,48 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; Unpack IEEE op1 of dyadic operations. +; +; INPUTS: AuBC: 32bits +; +; A AAAAAAAB BBBBBBBBBBBBBBBCCCCCCCC +; S EEEEEEEE FFFFFFFFFFFFFFFFFFFFFFF +; 0 1 8 9 31 +; +; OUTPUTS: uBC: Mantissa +; A: Exponent +; D: Sign Bit +; ZERO FLAG Set if op was zero. +; +; MODIFIES: +; flags +;-------------------------------------------------------------- + .def __fpupop1 + .assume adl=1 + +__fpupop1: + push ix + ld ix,0 + add ix,sp + push bc + rlc (ix-1) ;move high-bit to low-bit + scf + rr (ix-1) ;carry = exponent low-bit, high-bit = 1 + pop bc ;restore modified mantissa + rl a ;compute exponent, carry = sign + ld d,0 + jr nz,nzero ;skip if exponent non-zero + + ld bc,0 ;clear mantissa + or a,a ;clear carry +nzero: + rl d ;set 1 if negative operand + or a,a ;set Z/NZ + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/fpupop2.src b/frontends/calculator/CEdev/lib/shared/fpupop2.src new file mode 100644 index 0000000..8461f59 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fpupop2.src @@ -0,0 +1,47 @@ +;-------------------------------------------------------------- +; +; Code Generation Helper +; For the Zilog eZ80 C Compiler +; Copyright 1992-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +;-------------------------------------------------------------- +; +; Unpack IEEE op2 of dyadic operations. +; +; INPUTS: EuHL: 32 bits +; +; E EEEEEEEH HHHHHHHHHHHHHHHLLLLLLLL +; S EEEEEEEE FFFFFFFFFFFFFFFFFFFFFFF +; 0 1 8 9 31 +; +; OUTPUTS: uHL: Mantissa +; E: Exponent +; D: Sign Bit +; ZERO FLAG Set if op was zero. +; +; MODIFIES: +; flags +;-------------------------------------------------------------- + .def __fpupop2 + .assume adl=1 + +__fpupop2: + push bc + ld bc,0800000h + add hl,bc + jr nc,ncarry + add hl,bc + scf +ncarry: + ld d,c + pop bc + rl e + jr nz,nzero + or a,a + sbc hl,hl +nzero: + rl d + inc e + dec e + ret diff --git a/frontends/calculator/CEdev/lib/shared/frameset.src b/frontends/calculator/CEdev/lib/shared/frameset.src new file mode 100644 index 0000000..669a9d2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frameset.src @@ -0,0 +1,12 @@ + .assume adl=1 + .def __frameset + +__frameset: + pop de + push ix + ld ix,0 + add ix,sp + add hl,sp + ld sp,hl + ex de,hl + jp (hl)
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/frameset0.src b/frontends/calculator/CEdev/lib/shared/frameset0.src new file mode 100644 index 0000000..061a597 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frameset0.src @@ -0,0 +1,9 @@ + .assume adl=1 + .def __frameset0 + +__frameset0: + pop hl + push ix + ld ix,0 + add ix,sp + jp (hl)
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/frbmuls.src b/frontends/calculator/CEdev/lib/shared/frbmuls.src new file mode 100644 index 0000000..c415d42 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frbmuls.src @@ -0,0 +1,53 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract short Multiplication signed. +; +; Input: +; Operand1: +; H : 8 bits +; +; Operand2: +; L : 8 bits +; +; Output: +; Result: A : 8 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frbmuls + .assume adl=1 + +__frbmuls: + push hl + ;; + ;; Check sign info + ;; + xor a,a + rl h + jr nc,_L0 + sub a,h + ld h,a +_L0: + xor a,a + rl l + jr nc,_L1 + sub a,l + ld l,a +_L1: + mlt hl + ld a,h + pop hl + or a,a + rra + adc a,0h + push af + ld a,h + xor a,l + jp p,_L2 + pop af + neg + ret +_L2: + pop af + ret + diff --git a/frontends/calculator/CEdev/lib/shared/frbtof.src b/frontends/calculator/CEdev/lib/shared/frbtof.src new file mode 100644 index 0000000..1967abb --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frbtof.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract unsigned char to float conversion. +; +; Input: +; Operand1: +; A : 8 bits +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frbtof + .assume adl=1 + +__frbtof equ 00029Ch diff --git a/frontends/calculator/CEdev/lib/shared/free.src b/frontends/calculator/CEdev/lib/shared/free.src new file mode 100644 index 0000000..4cf195e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/free.src @@ -0,0 +1,180 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\FREE.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /***************************************************************/
+; 2 /* */
+; 3 /* Copyright (C) 2000-2008 Zilog, Inc. */
+; 4 /* */
+; 5 /* San Jose, California */
+; 6 /* */
+; 7 /***************************************************************/
+; 8 #include <stdlib.h>
+; 9
+; 10 /*************************************************
+; 11 *
+; 12 * free - free up allocated memory
+; 13 *
+; 14 * Inputs:
+; 15 * ap - pointer to allocated memory
+; 16 *
+; 17 * Returns:
+; 18 * nothing
+; 19 *
+; 20 *************************************************/
+; 21 extern HEADER _alloc_base;
+; 22
+; 23 void free(void *ap) {
+_free:
+ LD HL,-21
+ CALL __frameset
+; 24 HEADER *p;
+; 25 HEADER *q;
+; 26
+; 27 if (!ap) {
+ LD HL,(IX+6)
+ CALL __icmpzero
+ JR Z,L_12
+; 28 return;
+; 29 }
+; 30
+; 31 q = (HEADER*)ap - 1;
+ LD IY,(IX+6)
+ LEA IY,IY+-6
+ LD (IX+-3),IY
+; 32
+; 33 for (p = &_alloc_base; p->s.ptr && p->s.ptr < q; p = p->s.ptr);
+ LD BC,__alloc_base
+ LD (IX+-15),BC
+ JR L_5
+L_3:
+ LD IY,(IX+-12)
+ LD BC,(IY+0)
+ LD (IX+-15),BC
+L_5:
+ LD IY,(IX+-15)
+ LEA BC,IY+0
+ LD (IX+-12),BC
+ LD (IX+-18),BC
+ LD IY,(IX+-12)
+ LD HL,(IY+0)
+ CALL __icmpzero
+ JR Z,L_8
+ LD BC,(IX+-12)
+ LD (IX+-18),BC
+ LD BC,(IX+-3)
+ LD IY,(IX+-12)
+ LD HL,(IY+0)
+ OR A,A
+ SBC HL,BC
+ JR C,L_3
+L_8:
+; 34
+; 35 /* join upper */
+; 36 if ((char*)p->s.ptr == ((char*)q) + q->s.size) {
+ LD BC,(IX+-18)
+ LD (IX+-9),BC
+ LD IY,(IX+-3)
+ LD BC,(IY+3)
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD IY,(IX+-9)
+ LD BC,(IY+0)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_7
+; 37 q->s.size += p->s.ptr->s.size;
+ LD IY,(IX+-9)
+ LD DE,(IY+0)
+ LD IY,(IX+-3)
+ LD BC,(IY+3)
+ LD IY,DE
+ LD HL,(IY+3)
+ ADD HL,BC
+ LD IY,(IX+-3)
+ LD (IY+3),HL
+; 38 q->s.ptr = p->s.ptr->s.ptr;
+ LD BC,(IX+-9)
+ LD (IX+-21),BC
+ LD IY,(IX+-9)
+ LD IY,(IY+0)
+ LD BC,(IY+0)
+ LD IY,(IX+-3)
+ LD (IY+0),BC
+; 39 } else {
+ JR L_11
+L_7:
+; 40 q->s.ptr = p->s.ptr;
+ LD BC,(IX+-9)
+ LD (IX+-21),BC
+ LD IY,(IX+-9)
+ LD BC,(IY+0)
+ LD IY,(IX+-3)
+ LD (IY+0),BC
+; 41 }
+L_11:
+; 42
+; 43 /* join lower */
+; 44 if (((char*)p) + p->s.size == (char*)q) {
+ LD BC,(IX+-21)
+ LD (IX+-6),BC
+ LD IY,(IX+-6)
+ LD BC,(IY+3)
+ LD HL,(IX+-15)
+ ADD HL,BC
+ OR A,A
+ LD BC,(IX+-3)
+ SBC HL,BC
+ JR NZ,L_10
+; 45 p->s.size += q->s.size;
+ LD IY,(IX+-6)
+ LD BC,(IY+3)
+ LD IY,(IX+-3)
+ LD HL,(IY+3)
+ ADD HL,BC
+ LD IY,(IX+-6)
+ LD (IY+3),HL
+; 46 p->s.ptr = q->s.ptr;
+ LD IY,(IX+-3)
+ LD BC,(IY+0)
+ LD IY,(IX+-6)
+ LD (IY+0),BC
+; 47 } else {
+ JR L_12
+L_10:
+; 48 p->s.ptr = q;
+ LD BC,(IX+-3)
+ LD IY,(IX+-6)
+ LD (IY+0),BC
+; 49 }
+; 50 }
+L_12:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _free ***************************
+;Name Addr/Register Size Type
+;__alloc_base IMPORT 6 variable
+;G_9 IX-21 3 variable
+;G_2 IX-18 3 variable
+;p IX-15 3 variable
+;G_1 IX-12 3 variable
+;G_5 IX-9 3 variable
+;G_10 IX-6 3 variable
+;q IX-3 3 variable
+;ap IX+6 3 parameter
+
+
+; Stack Frame Size: 30 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __alloc_base:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XDEF _free
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/frftob.src b/frontends/calculator/CEdev/lib/shared/frftob.src new file mode 100644 index 0000000..39065d8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frftob.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; float to fract char conversion. +; +; Input: +; Operand1: +; eHL : 32 bits +; +; Output: +; Result: A : 8 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frftob + .assume adl=1 + +__frftob equ 0002A0h diff --git a/frontends/calculator/CEdev/lib/shared/frftoi.src b/frontends/calculator/CEdev/lib/shared/frftoi.src new file mode 100644 index 0000000..048c298 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frftoi.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; float to fract integer conversion. +; +; Input: +; Operand1: +; eHL : 32 bits +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frftoi + .assume adl=1 + +__frftoi equ 0002A8h diff --git a/frontends/calculator/CEdev/lib/shared/frftos.src b/frontends/calculator/CEdev/lib/shared/frftos.src new file mode 100644 index 0000000..b2f71b1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frftos.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; float to fract short conversion. +; +; Input: +; Operand1: +; eHL : 32 bits +; +; Output: +; Result: HL : 16 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frftos + .assume adl=1 + +__frftos equ 0002B0h diff --git a/frontends/calculator/CEdev/lib/shared/frftoub.src b/frontends/calculator/CEdev/lib/shared/frftoub.src new file mode 100644 index 0000000..e07b750 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frftoub.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; float to fract unsigned char conversion. +; +; Input: +; Operand1: +; eHL : 32 bits +; +; Output: +; Result: A : 8 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frftoub + .assume adl=1 + +__frftoub equ 0002A4h diff --git a/frontends/calculator/CEdev/lib/shared/frftoui.src b/frontends/calculator/CEdev/lib/shared/frftoui.src new file mode 100644 index 0000000..07ef9c0 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frftoui.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; float to fract unsigned integer conversion. +; +; Input: +; Operand1: +; eHL : 32 bits +; +; Output: +; Result: HL : 24 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frftoui + .assume adl=1 + +__frftoui equ 0002ACh diff --git a/frontends/calculator/CEdev/lib/shared/frftous.src b/frontends/calculator/CEdev/lib/shared/frftous.src new file mode 100644 index 0000000..0fbb6b2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frftous.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; float to fract unsigned short conversion. +; +; Input: +; Operand1: +; eHL : 32 bits +; +; Output: +; Result: HL : 16 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frftous + .assume adl=1 + +__frftous equ 0002B4h diff --git a/frontends/calculator/CEdev/lib/shared/frimuls.src b/frontends/calculator/CEdev/lib/shared/frimuls.src new file mode 100644 index 0000000..955d658 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frimuls.src @@ -0,0 +1,81 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract interger Multiplication Unsigned. +; +; Input: +; Operand1: +; uHL : 24 bits +; +; Operand2: +; uBC : 24 bits +; +; Output: +; Result: uHL : 24 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .assume adl=1 + .def __frimuls + .ref __frimulu + +__frimuls: + push af + push de + push bc + push hl + ;; + ;; Check sign info + ;; + add hl,hl + jr nc,_L0 + ex de,hl + or a,a + sbc hl,hl + sbc hl,de +_L0: + ex de,hl + or a,a + sbc hl,hl + add hl,bc + add hl,hl + jr nc,_L1 + or a,a + sbc hl,hl + sbc hl,bc + add hl,hl +_L1: + ld bc,hl + ex de,hl + call __frimulu + push hl + ex de,hl + ld hl,2 + add hl,sp + rr (hl) + rr d + rr e + pop hl + ld h,d + ld l,e + ;; + ;; Check signs + ;; + ex de,hl + ld hl,2 + add hl,sp + ld a,(hl) + inc hl + ld sp,hl + inc hl + inc hl + xor a,(hl) + jp p,_L2 + sbc hl,hl + sbc hl,de + ex de,hl +_L2: + ex de,hl + pop bc + pop de + pop af + ret diff --git a/frontends/calculator/CEdev/lib/shared/frimulu.src b/frontends/calculator/CEdev/lib/shared/frimulu.src new file mode 100644 index 0000000..d008a49 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frimulu.src @@ -0,0 +1,112 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract interger Multiplication Unsigned. +; +; Input: +; Operand1: +; uHL : 24 bits +; +; Operand2: +; uBC : 24 bits +; +; Output: +; Result: uHL : 24 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .assume adl=1 + .def __frimulu + +__frimulu: + push af + push de + push iy + push bc + push hl + ld d,l + ld e,c + mlt de + ld a,d + ld d,h + ld e,b + ld b,h + ld h,e + mlt hl + mlt bc + mlt de + add a,c + ld c,a + ld a,b + adc a,0h + ld b,a + add.s hl,bc + jr nc,_L0 + inc d +_L0: + ld iy,0h + add iy,sp + ld b,(iy+2) + ld c,(iy+5) + mlt bc + ld a,h + add a,e + ld e,a + jr nc,_L1 + inc d + jr nz,_L1 + inc bc +_L1: + ld h,(iy+2) + ld l,(iy+3) + mlt hl + + ld a,l ;approximation + add a,80h + ld l,a + ld a,h + adc a,0h + ld h,a + + add.s hl,de + jr nc,_L2 + inc bc +_L2: + ld d,(iy+0) + ld e,(iy+5) + mlt de + add.s hl,de + jr nc,_L3 + inc bc +_L3: + ld a,h + ld d,(iy+2) + ld e,(iy+4) + ld h,(iy+1) + ld l,(iy+5) + mlt de + mlt hl + add.s hl,de + jr nc,_L4 + inc b +_L4: + add a,l + ld l,a + ld a,h + adc a,c + ld h,a + jr nc,_L5 + inc b +_L5: + ex de,hl + push bc + dec sp + pop hl + inc sp + ld h,d + ld l,e + pop bc + pop bc + pop iy + pop de + pop af + ret diff --git a/frontends/calculator/CEdev/lib/shared/fritof.src b/frontends/calculator/CEdev/lib/shared/fritof.src new file mode 100644 index 0000000..d35fb32 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fritof.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract integer to float conversion. +; +; Input: +; Operand1: +; HL : 24 bits +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __fritof + .assume adl=1 + +__fritof equ 0002B8h diff --git a/frontends/calculator/CEdev/lib/shared/frsmuls.src b/frontends/calculator/CEdev/lib/shared/frsmuls.src new file mode 100644 index 0000000..b337a01 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frsmuls.src @@ -0,0 +1,61 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract short Multiplication signed. +; +; Input: +; Operand1: +; HL : 16 bits +; +; Operand2: +; BC : 16 bits +; +; Output: +; Result: HL : 16 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .assume adl=1 + .def __frsmuls + .ref __frsmulu + +__frsmuls: + push af + push de + push bc + push hl + ;; + ;; Check sign info + ;; + add.s hl,hl + jr nc,_L0 + ex de,hl + or a,a + sbc hl,hl + sbc hl,de +_L0: + rl c + rl b + jr nc,_L1 + ex de,hl + or a,a + sbc hl,hl + sbc hl,bc + ld b,h + ld c,l + ex de,hl +_L1: + call __frsmulu + srl h + rr l + pop af + pop bc + xor a,b + jp p,_L2 + ex de,hl + sbc hl,hl + sbc hl,de +_L2: + pop de + pop af + ret + diff --git a/frontends/calculator/CEdev/lib/shared/frsmulu.src b/frontends/calculator/CEdev/lib/shared/frsmulu.src new file mode 100644 index 0000000..ca9e7f6 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frsmulu.src @@ -0,0 +1,51 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract interger Multiplication Unsigned. +; +; Input: +; Operand1: +; HL : 16 bits +; +; Operand2: +; BC : 16 bits +; +; Output: +; Result: HL : 16 bits +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frsmulu + .assume adl=1 + +__frsmulu: + push af + push de + push bc + ld d,l + ld e,c + mlt de + ld a,d + ld d,h + ld e,b + ld b,h + ld h,e + mlt hl + mlt bc + mlt de + add a,c + jr nc,_L0 + inc de +_L0: + ld c,a + xor a,a + add hl,bc + adc a,d + ld d,a + ld l,h + ld h,0h + ex de,hl + add hl,de + pop bc + pop de + pop af + ret diff --git a/frontends/calculator/CEdev/lib/shared/frstof.src b/frontends/calculator/CEdev/lib/shared/frstof.src new file mode 100644 index 0000000..a5e8003 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frstof.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract short to float conversion. +; +; Input: +; Operand1: +; HL : 24 bits +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frstof + .assume adl=1 + +__frstof equ 0002C0h diff --git a/frontends/calculator/CEdev/lib/shared/frubtof.src b/frontends/calculator/CEdev/lib/shared/frubtof.src new file mode 100644 index 0000000..7a2a234 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frubtof.src @@ -0,0 +1,17 @@ +; (c) Copyright 2004-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract unsigned char to float conversion. +; +; Input: +; Operand1: +; A : 8 bits +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frubtof + .assume adl=1 + +__frubtof equ 0002C4h diff --git a/frontends/calculator/CEdev/lib/shared/fruitof.src b/frontends/calculator/CEdev/lib/shared/fruitof.src new file mode 100644 index 0000000..a173276 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/fruitof.src @@ -0,0 +1,17 @@ +; (c) Copyright 2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract unsigned integer to float conversion. +; +; Input: +; Operand1: +; HL : 24 bits +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __fruitof + .assume adl=1 + +__fruitof equ 0002BCh diff --git a/frontends/calculator/CEdev/lib/shared/frustof.src b/frontends/calculator/CEdev/lib/shared/frustof.src new file mode 100644 index 0000000..4cf0ba8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/frustof.src @@ -0,0 +1,17 @@ +; (c) Copyright 2008 Zilog, Inc. +;------------------------------------------------------------------------- +; fract unsigned short to float conversion. +; +; Input: +; Operand1: +; HL : 16 bits +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __frustof + .assume adl=1 + +__frustof equ 0002C8h diff --git a/frontends/calculator/CEdev/lib/shared/gamma.src b/frontends/calculator/CEdev/lib/shared/gamma.src new file mode 100644 index 0000000..a86cc0f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/gamma.src @@ -0,0 +1,439 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\GAMMA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*
+; 2 * gamma.c - public domain implementation of function tgamma(3m)
+; 3 * reference - Haruhiko Okumura: C-gengo niyoru saishin algorithm jiten
+; 4 * (New Algorithm handbook in C language) (Gijyutsu hyouronsha, Tokyo, 1991) [in Japanese]
+; 5 * http://oku.edu.mie-u.ac.jp/~okumura/algo/
+; 6 */
+; 7
+; 8 #include <math.h>
+; 9 #include <errno.h>
+; 10
+; 11 #define N 8
+; 12
+; 13 #define B0 1 /* Bernoulli numbers */
+; 14 #define B1 (-1.0 / 2.0)
+; 15 #define B2 ( 1.0 / 6.0)
+; 16 #define B4 (-1.0 / 30.0)
+; 17 #define B6 ( 1.0 / 42.0)
+; 18 #define B8 (-1.0 / 30.0)
+; 19 #define B10 ( 5.0 / 66.0)
+; 20 #define B12 (-691.0 / 2730.0)
+; 21 #define B14 ( 7.0 / 6.0)
+; 22 #define B16 (-3617.0 / 510.0)
+; 23
+; 24 static double loggamma(double x) { /* the natural logarithm of the Gamma function. */
+_loggamma:
+ LD HL,-22
+ CALL __frameset
+; 25 double v, w;
+; 26
+; 27 v = 1;
+ LD BC,8388608
+ LD (IX+-8),BC
+ LD A,63
+ LD (IX+-5),A
+; 28 while (x < N) { v *= x; x++; }
+ JR L_1
+L_2:
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ LD BC,(IX+-8)
+ LD A,(IX+-5)
+ CALL __fmul
+ LD (IX+-8),BC
+ LD (IX+-5),A
+ LD BC,(IX+6)
+ LD A,(IX+9)
+ LD HL,8388608
+ LD E,63
+ CALL __fadd
+ LD (IX+6),BC
+ LD (IX+9),A
+L_1:
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ LD BC,0
+ LD A,65
+ CALL __fcmp
+ JP M,L_2
+; 29 w = 1 / (x * x);
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ LD BC,(IX+6)
+ LD A,(IX+9)
+ CALL __fmul
+ LD E,A
+ LD HL,BC
+ LD BC,8388608
+ LD A,63
+ CALL __fdiv
+ LD (IX+-4),BC
+ LD (IX+-1),A
+; 30 return ((((((((B16 / (16 * 15)) * w + (B14 / (14 * 13))) * w
+; 31 + (B12 / (12 * 11))) * w + (B10 / (10 * 9))) * w
+; 32 + (B8 / ( 8 * 7))) * w + (B6 / ( 6 * 5))) * w
+; 33 + (B4 / ( 4 * 3))) * w + (B2 / ( 2 * 1))) / x
+; 34 + 0.5 * M_LOG_2M_PI - log(v) - x + (x - 0.5) * log(x);
+ LD HL,15864886
+ LD E,188
+ CALL __fmul
+ LD HL,13765920
+ LD E,59
+ CALL __fadd
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ CALL __fmul
+ LD HL,16471432
+ LD E,186
+ CALL __fadd
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ CALL __fmul
+ LD HL,6072562
+ LD E,58
+ CALL __fadd
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ CALL __fmul
+ LD HL,1837505
+ LD E,186
+ CALL __fadd
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ CALL __fmul
+ LD HL,5246209
+ LD E,58
+ CALL __fadd
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ CALL __fmul
+ LD HL,3541857
+ LD E,187
+ CALL __fadd
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ CALL __fmul
+ LD HL,11184811
+ LD E,61
+ CALL __fadd
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __fdiv
+ LD HL,7028622
+ LD E,63
+ CALL __fadd
+ LD (IX+-12),BC
+ LD C,(IX+-5)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+-8)
+ PUSH BC
+ LD (IX+-9),A
+ CALL _log
+ POP BC
+ POP BC
+ LD A,E
+ LD BC,HL
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __fadd
+ LD E,A
+ LD HL,BC
+ LD BC,(IX+-12)
+ LD A,(IX+-9)
+ CALL __fsub
+ LD (IX+-19),A
+ LD (IX+-18),BC
+ LD BC,(IX+6)
+ LD A,(IX+9)
+ OR A,A
+ SBC HL,HL
+ LD E,63
+ CALL __fsub
+ LD (IX+-15),BC
+ LD C,(IX+9)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ LD B,A
+ LD (IX+-22),BC
+ CALL _log
+ LD BC,(IX+-22)
+ POP IY
+ POP IY
+ LD A,B
+ LD BC,(IX+-15)
+ CALL __fmul
+ LD E,A
+ LD A,(IX+-19)
+ LD HL,BC
+ LD BC,(IX+-18)
+ CALL __fadd
+ LD E,A
+ LD HL,BC
+; 35 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _loggamma ***************************
+;Name Addr/Register Size Type
+;_log IMPORT ----- function
+;v IX-8 4 variable
+;w IX-4 4 variable
+;x IX+6 4 parameter
+
+
+; Stack Frame Size: 34 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 36
+; 37 double tgamma(double x) { /* Gamma function */
+_tgamma:
+ LD HL,-26
+ CALL __frameset
+; 38 if (x == 0.0) { /* Pole Error */
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ LD BC,0
+ XOR A,A
+ CALL __fcmp
+ JR NZ,L_17
+; 39 errno = ERANGE;
+ LD BC,5
+ LD (_errno),BC
+; 40 return 1/x < 0 ? -HUGE_VAL : HUGE_VAL;
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ LD BC,8388608
+ LD A,63
+ CALL __fdiv
+ LD E,A
+ LD HL,BC
+ LD BC,0
+ XOR A,A
+ CALL __fcmp
+ JP P,L_7
+ LD BC,(__huge_val)
+ LD A,(__huge_val+3)
+ CALL __fneg
+ LD (IX+-14),BC
+ LD (IX+-11),A
+ JR L_8
+L_7:
+ LD BC,(__huge_val)
+ LD A,(__huge_val+3)
+ LD (IX+-14),BC
+ LD (IX+-11),A
+L_8:
+ LD HL,(IX+-14)
+ LD E,(IX+-11)
+ JR L_19
+; 41 }
+L_17:
+; 42 if (x < 0) {
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ XOR A,A
+ CALL __fcmp
+ JP P,L_18
+; 43 int sign;
+; 44 static double zero = 0.0;
+; 45 double i, f;
+; 46 f = modf(-x, &i);
+ PEA IX+-18
+ LD BC,(IX+6)
+ LD A,(IX+9)
+ CALL __fneg
+ LD DE,BC
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL _modf
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+-10),HL
+ LD (IX+-7),E
+; 47 if (f == 0.0) { /* Domain Error */
+ LD HL,(IX+-10)
+ LD E,(IX+-7)
+ LD BC,0
+ XOR A,A
+ CALL __fcmp
+ JR NZ,L_15
+; 48 errno = EDOM;
+ LD BC,4
+ LD (_errno),BC
+; 49 return zero/zero;
+ LD HL,(_0zero)
+ LD A,(_0zero+3)
+ LD E,A
+ LD A,(_0zero+3)
+ LD BC,(_0zero)
+ CALL __fdiv
+ LD E,A
+ LD HL,BC
+ JR L_19
+; 50 }
+L_15:
+; 51 sign = (fmod(i, 2.0) != 0.0) ? 1 : -1;
+ LD C,64
+ LD B,0
+ PUSH BC
+ LD BC,0
+ PUSH BC
+ LD C,(IX+-15)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+-18)
+ PUSH BC
+ CALL _fmod
+ POP BC
+ POP BC
+ POP BC
+ POP BC
+ LD BC,0
+ XOR A,A
+ CALL __fcmp
+ JR Z,L_13
+ LD BC,1
+ LD (IX+-3),BC
+ JR L_14
+L_13:
+ LD BC,16777215
+ LD (IX+-3),BC
+L_14:
+ LD BC,(IX+-3)
+ LD (IX+-6),BC
+; 52 return sign * M_PI / (sin(M_PI * f) * exp(loggamma(1 - x)));
+ CALL __itol
+ CALL __ltof
+ LD HL,4788187
+ LD E,64
+ CALL __fmul
+ LD (IX+-22),A
+ LD (IX+-21),BC
+ LD BC,(IX+-10)
+ LD A,(IX+-7)
+ LD HL,4788187
+ LD E,64
+ CALL __fmul
+ LD DE,BC
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL _sin
+ POP BC
+ POP BC
+ LD (IX+-26),E
+ LD (IX+-25),HL
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ LD BC,8388608
+ LD A,63
+ CALL __fsub
+ LD DE,BC
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL _loggamma
+ POP BC
+ POP BC
+ LD C,E
+ LD B,0
+ PUSH BC
+ PUSH HL
+ CALL _exp
+ POP BC
+ POP BC
+ LD A,(IX+-26)
+ LD BC,(IX+-25)
+ CALL __fmul
+ LD E,A
+ LD A,(IX+-22)
+ LD HL,BC
+ LD BC,(IX+-21)
+ CALL __fdiv
+ LD E,A
+ LD HL,BC
+ JR L_19
+; 53 }
+L_18:
+; 54 return exp(loggamma(x));
+ LD C,(IX+9)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL _loggamma
+ POP BC
+ POP BC
+ LD C,E
+ LD B,0
+ PUSH BC
+ PUSH HL
+ CALL _exp
+ POP BC
+ POP BC
+; 55 }
+L_19:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _tgamma ***************************
+;Name Addr/Register Size Type
+;_exp IMPORT ----- function
+;_sin IMPORT ----- function
+;_fmod IMPORT ----- function
+;_0zero STATIC 4 variable
+;_modf IMPORT ----- function
+;__huge_val IMPORT 4 variable
+;_errno IMPORT 3 variable
+;i IX-18 4 variable
+;temp5 IX-14 4 variable
+;f IX-10 4 variable
+;sign IX-6 3 variable
+;temp11 IX-3 3 variable
+;x IX+6 4 parameter
+
+
+; Stack Frame Size: 38 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ SEGMENT DATA
+_0zero:
+ DF 0.0
+ XREF _errno:ROM
+ XREF _modf:ROM
+ XREF _fmod:ROM
+ XREF _log:ROM
+ XREF _exp:ROM
+ XREF _sin:ROM
+ XREF __huge_val:ROM
+ XREF __fadd:ROM
+ XREF __fsub:ROM
+ XREF __fmul:ROM
+ XREF __fdiv:ROM
+ XREF __fneg:ROM
+ XREF __fcmp:ROM
+ XREF __ltof:ROM
+ XREF __itol:ROM
+ XREF __frameset:ROM
+ XDEF _tgamma
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/getstringinput.src b/frontends/calculator/CEdev/lib/shared/getstringinput.src new file mode 100644 index 0000000..b3282c3 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/getstringinput.src @@ -0,0 +1,136 @@ +; --- +; void os_GetStringInput(char *string, char *buf, size_t size) +; --- + + .def _os_GetStringInput + .assume adl=1 + +kUp := 3 +kLeft := 2 +kDown := 4 +kEnter := 5 +kClear := 9 +kRight := 1 +curLock := 4 +flags := $D00080 +curRow := $D00595 +curUnder := $D00599 +_PutS := $207C0 +_PutC := $207B8 +_PutPS := $207C8 +_GetKey := $20D8C +_CursorOn := $208B0 +_CursorOff := $208A8 +_PullDownChk := $208BC +_ConvKeyToTok := $20E40 +_GetTokString := $20874 +_PutTokString := $20D74 + +_os_GetStringInput: + push ix + ld ix,0 + add ix,sp + ld hl,(ix+6) ; hl -> input string prompt + add hl,de + xor a,a + sbc hl,de + jr z,__nodisp + ld iy,flags + call _PutS +__nodisp: + ld hl,(curRow) + ld (__savecur),hl + ld a,(ix+12) + dec a + ld (ix+12),a + ld (ix+6),a +__start: + ld de,(ix+9) +__loop: + ld a,' ' + ld (curUnder),a + push de + push ix + call _CursorOn +__getkey: + call _GetKey + call _CursorOff + call _PullDownChk + call _CursorOn + jr c,__getkey + cp a,kLeft + jr z,__loop + cp a,kDown + jr z,__loop + cp a,kRight + jr z,__loop + cp a,kUp + jr z,__loop + cp a,kClear + jr z,__clearpop + cp a,kEnter + jr z,__done + call _ConvKeyToTok + call _GetTokString + pop ix + pop de + ld b,(hl) + inc hl + ld a,(ix+12) + sub a,b + jr nc,__notfull + ld b,(ix+12) + xor a,a +__notfull: + ld (ix+12),a +__draw: + ld a,(hl) + ld (de),a + inc hl + inc de + call _PutC + djnz __draw + ld a,(ix+12) + or a,a + jr nz,__loop +__full: + ld a,' ' + ld (curUnder),a + call _GetKey + cp a,kClear + jr z,__clear + cp a,kEnter + jr z,__exit + jr __full +__clearpop: + pop ix + pop de +__clear: +__savecur := $+1 + ld hl,0 + ld (curRow),hl + ld a,(ix+6) + ld b,(ix+12) + ld (ix+12),a + sub a,b + ld b,a + inc b +__clearloop: + ld a,' ' + call _PutC + djnz __clearloop + ld hl,(__savecur) + ld (curRow),hl + jr __start +__done: + pop ix + pop de +__exit: + ld a,' ' + ld (curUnder),a + xor a,a + ld (de),a + call _CursorOff + di + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/iand.src b/frontends/calculator/CEdev/lib/shared/iand.src new file mode 100644 index 0000000..79d731c --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/iand.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer AND. +; Input: +; Operand1: +; hl : 24 bit +; +; Operand2: +; bc : 24 bit +; +; Output: +; Result: hl : 24 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __iand + .assume adl=1 + +__iand equ 000134h diff --git a/frontends/calculator/CEdev/lib/shared/icmpzero.src b/frontends/calculator/CEdev/lib/shared/icmpzero.src new file mode 100644 index 0000000..fced974 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/icmpzero.src @@ -0,0 +1,20 @@ +; (c) Copyright 2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Set flag for comparison of 24-bit scalar with constant value zero +; Input: +; Operand1: HL register +; +; Output: +; Result: f register +; +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __icmpzero + .assume adl=1 + +__icmpzero: + add hl,de + or a,a + sbc hl,de + ret diff --git a/frontends/calculator/CEdev/lib/shared/idivs.src b/frontends/calculator/CEdev/lib/shared/idivs.src new file mode 100644 index 0000000..1c7bba1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/idivs.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Signed Integer Division +; Input: +; Operand1: +; hl : 24 bits (dividend x) +; +; Operand2: +; bc : 24 bits (divisor y) +; +; Output: +; Result: hl : 24 bits +; +; Registers Used: +; a, de +;------------------------------------------------------------------------- + .def __idivs + .assume adl=1 + +__idivs equ 00013Ch diff --git a/frontends/calculator/CEdev/lib/shared/idivu.src b/frontends/calculator/CEdev/lib/shared/idivu.src new file mode 100644 index 0000000..6fdcacc --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/idivu.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Integer Division. +; Input: +; Operand1: +; uHL : 24 bit dividend +; +; Operand2: +; uBC : 24 bit divisor +; +; Output: +; Result: uHL: 24 bit quotient +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __idivu,__idvrmu + .assume adl=1 + +__idivu equ 000140h +__idvrmu equ 000144h diff --git a/frontends/calculator/CEdev/lib/shared/ildix.src b/frontends/calculator/CEdev/lib/shared/ildix.src new file mode 100644 index 0000000..8702ff5 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ildix.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer load hl,(ix+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from ix +; +; Output: +; Result: hl : 24 bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __ildix + .assume adl=1 + +__ildix equ 000148h diff --git a/frontends/calculator/CEdev/lib/shared/ildiy.src b/frontends/calculator/CEdev/lib/shared/ildiy.src new file mode 100644 index 0000000..3883f15 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ildiy.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer load hl,(iy+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from iy +; +; Output: +; Result: hl : 24 bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __ildiy + .assume adl=1 + +__ildiy equ 00014Ch diff --git a/frontends/calculator/CEdev/lib/shared/imuls.src b/frontends/calculator/CEdev/lib/shared/imuls.src new file mode 100644 index 0000000..6d70bc3 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/imuls.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer Multiplication Signed. +; Input: +; Operand1: +; BC : 24 bits +; +; Operand2: +; HL : 24 bits +; +; Output: +; Result: hl : 24 bit +; Registers Used: +; de,af +;------------------------------------------------------------------------- + .def __imuls + .assume adl=1 + +__imuls equ 000154h diff --git a/frontends/calculator/CEdev/lib/shared/imulu.src b/frontends/calculator/CEdev/lib/shared/imulu.src new file mode 100644 index 0000000..fd9c068 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/imulu.src @@ -0,0 +1,24 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer Multiplication Unsigned. +; Note: When multipying two n-bit values, the low-order n-bits +; of the product are the same, whether or not the values +; are considered signed or unsigned. +; Input: +; Operand1: +; uHL : 24 bits +; +; Operand2: +; uBC : 24 bits +; +; Output: +; Result: uHL : 24 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __imulu,__imul_b + .assume adl=1 + +__imul_b equ 000150h +__imulu equ 000158h + diff --git a/frontends/calculator/CEdev/lib/shared/indcall.src b/frontends/calculator/CEdev/lib/shared/indcall.src new file mode 100644 index 0000000..5f5a122 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/indcall.src @@ -0,0 +1,14 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Indirect Call +; Input: +; Operand1: +; iy : 24 bit +; +; Output: +; Registers Used: +;------------------------------------------------------------------------- + .def __indcall + .assume adl=1 + +__indcall equ 00015Ch diff --git a/frontends/calculator/CEdev/lib/shared/ineg.src b/frontends/calculator/CEdev/lib/shared/ineg.src new file mode 100644 index 0000000..4bb0b46 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ineg.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer/short NEG. +; Input: +; Operand1: +; hl : 24/16 bit +; +; Output: +; Result: hl : 24/16 bit ( 0 - hl) +; Registers Used: +; a,de +;------------------------------------------------------------------------- + .def __ineg + .assume adl=1 + +__ineg equ 000160h diff --git a/frontends/calculator/CEdev/lib/shared/inot.src b/frontends/calculator/CEdev/lib/shared/inot.src new file mode 100644 index 0000000..8fcf888 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/inot.src @@ -0,0 +1,15 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer/Short NOT. +; Input: +; Operand1: +; hl : 24/16 bit +; +; Output: +; Result: hl : 24/16 bit +; Registers Used: +;------------------------------------------------------------------------- + .def __inot + .assume adl=1 + +__inot equ 000164h diff --git a/frontends/calculator/CEdev/lib/shared/interrupts.src b/frontends/calculator/CEdev/lib/shared/interrupts.src new file mode 100644 index 0000000..64d30d5 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/interrupts.src @@ -0,0 +1,142 @@ + .def _int_Initialize + .def _int_Handler + .def _int_SetVector + .def _int_Reset + .assume adl=1 + +;------------------------------------------------------------------------------- +; Interrupts equates +mpIntStatus equ 0F00000h +mpIntMask equ 0F00004h +mpIntAck equ 0F00008h +mpIntLachEnable equ 0F0000Ch +mpIntXor equ 0F00010h +mpIntStatusMasked equ 0F00014h + +intOnKey equ 1 +intTimer1 equ 2 +intTimer2 equ 4 +intTimer3 equ 8 +intOsTimer equ 10h +intKbd equ 400h +intLcd equ 800h +intRtc equ 1000h + +;------------------------------------------------------------------------------- +_int_Initialize: + di + ld de,lconf + ld hl,mpIntMask + ld bc,16 + ldir + ld hl,cconf + ld de,mpIntMask + ld bc,16 + ldir + ld hl,0D18879h + ld de,0C90611h + ld (hl),de + dec hl + ld (hl),0EDh + push hl + inc d + call 0D18878h + ld hl, 0E10010h | ((_int_Handler >> 8) & 000FF00h) + ld de, 0C3h | ((_int_Handler << 8) & 0FFFF00h) + ld (hl),h + inc hl + ld (hl),de + ld hl,0E30800h + ld bc,0401h + ld a,0E1h + call 00210E0h ; _Memset + ld hl,0E308h + ld i,hl + im 2 + ld d,3 + ret + +_int_Handler: + ex af,af' + exx + ld hl,(mpIntStatusMasked) + add hl,hl + inc hl + add hl,hl + xor a,a +isr_loop: + inc a + add hl,hl + jr nc,isr_loop +identified: + dec a + add a,a + add a,a + ld (isr_dispatch_smc+1),a + exx + ex af, af' +isr_dispatch_smc: + jr $+2 +iv_list: + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt + jp unhandledInt +unhandledInt: + ei + ret + +;------------------------------------------------------------------------------- +_int_SetVector: + ld iy,0 + add iy,sp + ld a,21 + ld l,(iy+3) + sub a,l + ld l,a + ld h,4 + mlt hl + ld de,iv_list+1 + add hl,de + ld de,(iy+6) + ld (hl),de + ret + +;------------------------------------------------------------------------------- +_int_Reset: + di + ld hl, lconf + ld de, mpIntMask + ld bc, 16 + ldir + im 1 + ret + segment bss +lconf: ds 16 + segment data +cconf: ; Mask + db 000h,000h,000h,000h + ; ACK + db 0FFh,0FFh,0FFh,0FFh + ; Latch + db 000h,000h,000h,000h + ; Invert + db 000h,000h,000h,000h diff --git a/frontends/calculator/CEdev/lib/shared/ior.src b/frontends/calculator/CEdev/lib/shared/ior.src new file mode 100644 index 0000000..0edcd5a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ior.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer OR. +; Input: +; Operand1: +; HL : 24 bit +; +; Operand2: +; BC : 24 bit +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __ior + .assume adl=1 + +__ior equ 000168h diff --git a/frontends/calculator/CEdev/lib/shared/irems.src b/frontends/calculator/CEdev/lib/shared/irems.src new file mode 100644 index 0000000..ef4c8d7 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/irems.src @@ -0,0 +1,19 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer Modulus Signed. +; Input: +; Operand1: +; HL : 24 bits (dividend) +; +; Operand2: +; BC : 24 bits (divisor) +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; de,af +;------------------------------------------------------------------------- + .def __irems + .assume adl=1 + +__irems equ 00016Ch diff --git a/frontends/calculator/CEdev/lib/shared/iremu.src b/frontends/calculator/CEdev/lib/shared/iremu.src new file mode 100644 index 0000000..dac22a0 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/iremu.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Integer Modulus +; Input: +; Operand1: +; uHL : 24 bits (dividend x) +; +; Operand2: +; uBC : 24 bits (divisor y) +; +; Output: +; Result: uHL : 24 bits (remainder) +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __iremu + .assume adl=1 + +__iremu equ 000170h + diff --git a/frontends/calculator/CEdev/lib/shared/isalnum.src b/frontends/calculator/CEdev/lib/shared/isalnum.src new file mode 100644 index 0000000..12c28a1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isalnum.src @@ -0,0 +1,28 @@ + .def _isalnum + .ref ___maptab + .assume adl=1 + +; original source +; int isalnum(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(UC|LC|DIG)); +; } + +_isalnum: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,13 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isalpha.src b/frontends/calculator/CEdev/lib/shared/isalpha.src new file mode 100644 index 0000000..94627ba --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isalpha.src @@ -0,0 +1,27 @@ + .def _isalpha + .ref ___maptab + .assume adl=1 + +; original source +; int isalnum(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(UC|LC)); + +_isalpha: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,12 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isascii.src b/frontends/calculator/CEdev/lib/shared/isascii.src new file mode 100644 index 0000000..0c88ffb --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isascii.src @@ -0,0 +1,19 @@ + .def _isascii + .assume adl=1 + +; original source +; int isascii(int c) { +; return c >= 0 && c < 128; +; } + +_isascii: + pop de + pop hl + push hl + push de + + ld de,-128 + add hl,de + sbc hl,hl + inc hl + ret diff --git a/frontends/calculator/CEdev/lib/shared/iscntrl.src b/frontends/calculator/CEdev/lib/shared/iscntrl.src new file mode 100644 index 0000000..a8e7864 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/iscntrl.src @@ -0,0 +1,27 @@ + .def _iscntrl + .ref ___maptab + .assume adl=1 + +;int iscntrl(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(CTL)); +;} + +_iscntrl: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,128 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isdigit.src b/frontends/calculator/CEdev/lib/shared/isdigit.src new file mode 100644 index 0000000..bbd555a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isdigit.src @@ -0,0 +1,27 @@ + .def _isdigit + .ref ___maptab + .assume adl=1 + +;int isdigit(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(DIG)); +;} + +_isdigit: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,1 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isgraph.src b/frontends/calculator/CEdev/lib/shared/isgraph.src new file mode 100644 index 0000000..59bc61e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isgraph.src @@ -0,0 +1,28 @@ + .def _isgraph + .ref ___maptab + .assume adl=1 + +; original source +; int isgraph(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(UC|LC|DIG|PUN)); +; } + +_isgraph: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,15 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/ishl.src b/frontends/calculator/CEdev/lib/shared/ishl.src new file mode 100644 index 0000000..b9a7347 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ishl.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer Shift Left +; Input: +; Operand1: +; BC : 24 bit number of bits to shift +; Asuume B=0 C=shift count +; Operand2: +; HL : 24 bit value to be shifted by C +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __ishl, __ishl_b + .assume adl=1 + +__ishl_b equ 000178h +__ishl equ 000174h diff --git a/frontends/calculator/CEdev/lib/shared/ishrs.src b/frontends/calculator/CEdev/lib/shared/ishrs.src new file mode 100644 index 0000000..79125e7 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ishrs.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer Shift Right Signed +; Input: +; Operand1: +; BC : 24 bit number of bits to shift +; Assume B=0 C=shift count +; Operand2: +; HL : 24 bit value to be shifted by C +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __ishrs, __ishrs_b + .assume adl=1 + +__ishrs_b equ 000180h +__ishrs equ 00017Ch diff --git a/frontends/calculator/CEdev/lib/shared/ishru.src b/frontends/calculator/CEdev/lib/shared/ishru.src new file mode 100644 index 0000000..ed190d4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ishru.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer Shift Right Unsigned +; Input: +; Operand1: +; BC : 24 bit number of bits to shift +; Assume B=0 C=shift count +; Operand2: +; HL : 24 bit value to be shifted by C +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __ishru, __ishru_b + .assume adl=1 + +__ishru_b equ 000188h +__ishru equ 000184h
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/isinf.src b/frontends/calculator/CEdev/lib/shared/isinf.src new file mode 100644 index 0000000..1c0c46b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isinf.src @@ -0,0 +1,20 @@ + .ref __frameset0 + .def _isinf + .assume adl=1 + +; int isinf(double n); + +_isinf: + call __frameset0 + ld hl,(ix+6) + adc hl,hl + jr nz,l_1 + ld hl,(ix+8) + add hl,hl + inc h +l_1: ld hl,0 + jr nz,l_2 + inc hl +l_2: ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/islower.src b/frontends/calculator/CEdev/lib/shared/islower.src new file mode 100644 index 0000000..3f72f9c --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/islower.src @@ -0,0 +1,29 @@ + .def _islower + .ref ___maptab + .assume adl=1 + +; original source +; int islower(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(LC)); +; } + +_islower: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + ld a,e + and a,128 + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,4 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isnan.src b/frontends/calculator/CEdev/lib/shared/isnan.src new file mode 100644 index 0000000..129bf69 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isnan.src @@ -0,0 +1,20 @@ + .ref __frameset0 + .def _isnan + .assume adl=1 + +; int isnan(double n); + +_isnan: + call __frameset0 + ld hl,(ix+6) + adc hl,hl + jr z,l_1 + ld hl,(ix+8) + add hl,hl +l_1: inc h + ld hl,0 + jr nz,l_2 + inc hl +l_2: ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/isprint.src b/frontends/calculator/CEdev/lib/shared/isprint.src new file mode 100644 index 0000000..79b7bbf --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isprint.src @@ -0,0 +1,28 @@ + .def _isprint + .ref ___maptab + .assume adl=1 + +; original source +; int isprint(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(UC|LC|DIG|PUN|SP)); +; } + +_isprint: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,47 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/ispunct.src b/frontends/calculator/CEdev/lib/shared/ispunct.src new file mode 100644 index 0000000..52a2e79 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ispunct.src @@ -0,0 +1,28 @@ + .def _ispunct + .ref ___maptab + .assume adl=1 + +; original source +; int ispunct(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(PUN)); +; } + +_ispunct: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,2 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isspace.src b/frontends/calculator/CEdev/lib/shared/isspace.src new file mode 100644 index 0000000..4e670f2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isspace.src @@ -0,0 +1,28 @@ + .def _isspace + .ref ___maptab + .assume adl=1 + +; original source +; int isspace(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(WS)); +; } + +_isspace: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,64 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/istix.src b/frontends/calculator/CEdev/lib/shared/istix.src new file mode 100644 index 0000000..8570366 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/istix.src @@ -0,0 +1,18 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer store (ix+nnnnnn),HL +; Input: +; Operand1: +; BC : 24-bit offset from ix +; HL : 24-bit integer to store +; +; Output: +; +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __istix + .assume adl=1 + +__istix equ 00018Ch diff --git a/frontends/calculator/CEdev/lib/shared/istiy.src b/frontends/calculator/CEdev/lib/shared/istiy.src new file mode 100644 index 0000000..7ca71ea --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/istiy.src @@ -0,0 +1,18 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer store (iy+nnnnnn),HL +; Input: +; Operand1: +; BC : 24-bit offset from iy +; HL : 24-bit integer to store +; +; Output: +; +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __istiy + .assume adl=1 + +__istiy equ 000190h diff --git a/frontends/calculator/CEdev/lib/shared/isupper.src b/frontends/calculator/CEdev/lib/shared/isupper.src new file mode 100644 index 0000000..300474e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isupper.src @@ -0,0 +1,28 @@ + .def _isupper + .ref ___maptab + .assume adl=1 + +; original source +; int isupper(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(UC)); +; } + +_isupper: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,8 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/isxdigit.src b/frontends/calculator/CEdev/lib/shared/isxdigit.src new file mode 100644 index 0000000..9db54a4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/isxdigit.src @@ -0,0 +1,28 @@ + .def _isxdigit + .ref ___maptab + .assume adl=1 + +; original source +; int isxdigit(int c) { +; if( (unsigned char)c & (unsigned char)0x80 ) +; return (0); +; return(__maptab[c] & (unsigned char)(DIG|HEX)); +; } + +_isxdigit: + pop hl + pop de + push de + push hl + or a,a + sbc hl,hl + bit 7,e + ret nz + ex de,hl + ld de,___maptab + add hl,de + ld a,(hl) + and a,17 + sbc hl,hl + ld l,a + ret diff --git a/frontends/calculator/CEdev/lib/shared/itol.src b/frontends/calculator/CEdev/lib/shared/itol.src new file mode 100644 index 0000000..8efd34d --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/itol.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Signed Integer to Long conversion +; Input: +; Operand1: +; BC : 24 bit +; +; Output: +; Result: A:BC : 32 bit +; Registers Used: +; +;------------------------------------------------------------------------- + .def __itol + .assume adl=1 + +__itol equ 000194h diff --git a/frontends/calculator/CEdev/lib/shared/ixor.src b/frontends/calculator/CEdev/lib/shared/ixor.src new file mode 100644 index 0000000..75299dd --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ixor.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer XOR. +; Input: +; Operand1: +; hl : 24 bit +; +; Operand2: +; bc : 24 bit +; +; Output: +; Result: hl : 24 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __ixor + .assume adl=1 + +__ixor equ 000198h diff --git a/frontends/calculator/CEdev/lib/shared/labs.src b/frontends/calculator/CEdev/lib/shared/labs.src new file mode 100644 index 0000000..38cd6dc --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/labs.src @@ -0,0 +1,24 @@ + .ref __frameset0 + .ref __lcmpzero + .ref __setflag + .ref __lneg + .def _labs + .assume adl=1 + +; long labs(long j); + +_labs: + call __frameset0 + ld hl,(ix+6) + ld e,(ix+9) + push hl + push de + call __lcmpzero + call __setflag + pop de + pop hl + jp p,l_1 + call __lneg +l_1: ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/ladd.src b/frontends/calculator/CEdev/lib/shared/ladd.src new file mode 100644 index 0000000..c678a1e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ladd.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long ADD. +; Input: +; Operand1: +; ehl : 32 bit +; +; Operand2: +; abc : 32 bit +; +; Output: +; Result: ehl : 32 bit +; Registers Used: + +;------------------------------------------------------------------------- + .def __ladd, __ladd_b + .assume adl=1 + +__ladd_b equ 0001A0h +__ladd equ 00019Ch diff --git a/frontends/calculator/CEdev/lib/shared/land.src b/frontends/calculator/CEdev/lib/shared/land.src new file mode 100644 index 0000000..6db554a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/land.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long AND. +; Input: +; Operand1: +; ehl : 32 bit +; +; Operand2: +; abc : 32 bit +; +; Output: +; Result: ehl : 32 bit +; Registers Used: + +;------------------------------------------------------------------------- + .def __land + .assume adl=1 + +__land equ 0001A4h diff --git a/frontends/calculator/CEdev/lib/shared/lcmps.src b/frontends/calculator/CEdev/lib/shared/lcmps.src new file mode 100644 index 0000000..495cadd --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lcmps.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Comparison +; Input: +; Operand1: +; EHL : 32 bits +; +; Operand2: +; ABC : 32 bits +; +; Output: +; Result: F : S,V flags from EHL - ABC +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __lcmps + .assume adl=1 + +__lcmps equ 0001A8h diff --git a/frontends/calculator/CEdev/lib/shared/lcmpu.src b/frontends/calculator/CEdev/lib/shared/lcmpu.src new file mode 100644 index 0000000..5d7db79 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lcmpu.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Unsigned Comparison +; Input: +; Operand1: +; EHL : 32 bits +; +; Operand2: +; ABC : 32 bits +; +; Output: +; Result: F : S,V flags from EHL - ABC +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __lcmpu + .assume adl=1 + +__lcmpu equ 0001ACh diff --git a/frontends/calculator/CEdev/lib/shared/lcmpzero.src b/frontends/calculator/CEdev/lib/shared/lcmpzero.src new file mode 100644 index 0000000..518c58a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lcmpzero.src @@ -0,0 +1,16 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Set flag for comparison of 32-bit scalar with constant value zero +; Input: +; Operand1: E:HL register +; +; Output: +; Result: f register +; +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __lcmpzero + .assume adl=1 + +__lcmpzero equ 0001B0h diff --git a/frontends/calculator/CEdev/lib/shared/ldiv.src b/frontends/calculator/CEdev/lib/shared/ldiv.src new file mode 100644 index 0000000..8da316b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ldiv.src @@ -0,0 +1,79 @@ +; Copyright (C) 1999-2008 Zilog, Inc, All Rights Reserved +;------------------------------------------------------------------------- +; ldiv function +; +; ldiv_t ldiv(long numer, long denom); +; +;------------------------------------------------------------------------- + .def _ldiv + .ref __ldivs + .ref __lrems + .assume adl=1 + +_ldiv: + + push bc + push af + push de + push hl + + ld hl,27 + add hl,sp + ld a,(hl) + dec hl + dec hl + dec hl + ld bc,(hl) ; aBC : denominator + dec hl + dec hl + dec hl + ld e,(hl) + dec hl + dec hl + dec hl + ld hl,(hl) ; eHL: Numerator + call __ldivs + push de + push hl ; eHL : quotient + + ld hl,27 + add hl,sp + ld e,(hl) + dec hl + dec hl + dec hl + ld hl,(hl) + call __lrems + ld a,e + ex de,hl ;aDE :remainder + + ld hl,21 + add hl,sp + ld hl,(hl) + push hl + + ld bc, 7 + add hl, bc + ld (hl),a + dec hl + dec hl + dec hl + ld (hl),de ; aDE : remainder + + pop hl + pop bc + ld (hl),bc ; bc : 3 LSB of quotient + pop bc + push hl + inc hl + inc hl + inc hl + ld (hl),c ; c : MSB of quotient + pop hl + + pop de + pop de + pop af + pop bc + + ret diff --git a/frontends/calculator/CEdev/lib/shared/ldivs.src b/frontends/calculator/CEdev/lib/shared/ldivs.src new file mode 100644 index 0000000..950209e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ldivs.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Division Signed +; Input: +; Operand1: +; eHL : 32 bits +; +; Operand2: +; aBC : 32 bits +; Output: +; Result: eHL : 24 bits +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __ldivs + .assume adl=1 + +__ldivs equ 0001B4h diff --git a/frontends/calculator/CEdev/lib/shared/ldivu.src b/frontends/calculator/CEdev/lib/shared/ldivu.src new file mode 100644 index 0000000..c570423 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ldivu.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Division Unsigned +; Input: +; Operand1: +; EuHL : 32 bits +; +; Operand2: +; AuBC : 32 bits +; Output: +; Result: EuHL : 32 bits +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __ldivu, __ldvrmu + .assume adl=1 + +__ldivu equ 0001B8h +__ldvrmu equ 0001BCh diff --git a/frontends/calculator/CEdev/lib/shared/lldix.src b/frontends/calculator/CEdev/lib/shared/lldix.src new file mode 100644 index 0000000..379c4e7 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lldix.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; long load e:hl,(ix+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from ix +; +; Output: +; Result: E:HL : 32 bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __lldix + .assume adl=1 + +__lldix equ 0001C0h diff --git a/frontends/calculator/CEdev/lib/shared/lldiy.src b/frontends/calculator/CEdev/lib/shared/lldiy.src new file mode 100644 index 0000000..8e308fd --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lldiy.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; long load e:hl,(iy+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from iy +; +; Output: +; Result: E:HL : 32 bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __lldiy + .assume adl=1 + +__lldiy equ 0001C4h diff --git a/frontends/calculator/CEdev/lib/shared/lmuls.src b/frontends/calculator/CEdev/lib/shared/lmuls.src new file mode 100644 index 0000000..8f75c0b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lmuls.src @@ -0,0 +1,19 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Multiplication Signed. +; Input: +; Operand1: +; ABC : 32 bits +; +; Operand2: +; EHL : 32 bits +; +; Output: +; Result: ABC : 32 bit +; Registers Used: +; de,af +;------------------------------------------------------------------------- + .def __lmuls + .assume adl=1 + +__lmuls equ 0001C8h diff --git a/frontends/calculator/CEdev/lib/shared/lmulu.src b/frontends/calculator/CEdev/lib/shared/lmulu.src new file mode 100644 index 0000000..f84fe24 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lmulu.src @@ -0,0 +1,22 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Multiplication Signed/Unsigned. +; Note: When multipying two n-bit values, the low-order n-bits +; of the product are the same, whether or not the values +; are considered signed or unsigned. +; Input: +; Operand1: +; EuHL : 32 bits +; +; Operand2: +; AuBC : 32 bits +; +; Output: +; Result: EuHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __lmulu + .assume adl=1 + +__lmulu equ 0001CCh diff --git a/frontends/calculator/CEdev/lib/shared/lneg.src b/frontends/calculator/CEdev/lib/shared/lneg.src new file mode 100644 index 0000000..3e8b407 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lneg.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long NEG. +; Input: +; Operand1: +; EuHL : 32 bit +; +; Output: +; Result: EuHL : 32 bit +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __lneg + .assume adl=1 + +__lneg equ 0001D0h diff --git a/frontends/calculator/CEdev/lib/shared/lnot.src b/frontends/calculator/CEdev/lib/shared/lnot.src new file mode 100644 index 0000000..774b304 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lnot.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long NOT. +; Input: +; Operand1: +; eHL : 32 bit +; +; Output: +; Result: eHL : 32 bit +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __lnot + .assume adl=1 + +__lnot equ 0001D4h diff --git a/frontends/calculator/CEdev/lib/shared/log2.src b/frontends/calculator/CEdev/lib/shared/log2.src new file mode 100644 index 0000000..5630503 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/log2.src @@ -0,0 +1,27 @@ + .def _log2 + .ref _log + .ref __fdiv + .ref __frameset0 + .assume adl=1 + +_log2: + call __frameset0 + ld c,(ix+9) + ld b,0 + push bc + ld bc,(ix+6) + push bc + call _log + push hl + pop bc + ld a,e + ld hl,3240472 + ld e,63 + call __fdiv + ld e,a + push bc + pop hl + ld sp,ix + pop ix + ret + diff --git a/frontends/calculator/CEdev/lib/shared/longjmp.src b/frontends/calculator/CEdev/lib/shared/longjmp.src new file mode 100644 index 0000000..0399ff0 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/longjmp.src @@ -0,0 +1,4 @@ + .def _longjmp + .assume adl=1 + +_longjmp equ 000098h
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/lor.src b/frontends/calculator/CEdev/lib/shared/lor.src new file mode 100644 index 0000000..b9a3c95 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lor.src @@ -0,0 +1,19 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long OR. +; Input: +; Operand1: +; ehl : 32 bit +; +; Operand2: +; abc : 32 bit +; +; Output: +; Result: ehl : 32 bit +; Registers Used: +; +;------------------------------------------------------------------------- + .def __lor + .assume adl=1 + +__lor equ 0001D8h diff --git a/frontends/calculator/CEdev/lib/shared/lrems.src b/frontends/calculator/CEdev/lib/shared/lrems.src new file mode 100644 index 0000000..958404b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lrems.src @@ -0,0 +1,19 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Modulus Signed. +; Input: +; Operand1: +; EHL : 32 bits (dividend) +; +; Operand2: +; ABC : 32 bits (divisor) +; +; Output: +; Result: EHL : 32 bit +; Registers Used: +; de,af +;------------------------------------------------------------------------- + .def __lrems + .assume adl=1 + +__lrems equ 0001DCh diff --git a/frontends/calculator/CEdev/lib/shared/lremu.src b/frontends/calculator/CEdev/lib/shared/lremu.src new file mode 100644 index 0000000..6ed28b1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lremu.src @@ -0,0 +1,19 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Modulus Unsigned. +; Input: +; Operand1: +; EuHL : 32 bits (dividend x) +; +; Operand2: +; AuBC : 32 bits (divisor y) +; +; Output: +; Result: EuHL : 32 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __lremu + .assume adl=1 + +__lremu equ 0001E0h diff --git a/frontends/calculator/CEdev/lib/shared/lshl.src b/frontends/calculator/CEdev/lib/shared/lshl.src new file mode 100644 index 0000000..3038a0d --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lshl.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Shift Left +; Input: +; Operand1: +; AuBC : 32 bit value to be shifted +; +; Operand2: +; L : number of bits to shift +; +; Output: +; Result: AuBC : 32 bit result +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __lshl + .assume adl=1 + +__lshl equ 0001E4h diff --git a/frontends/calculator/CEdev/lib/shared/lshrs.src b/frontends/calculator/CEdev/lib/shared/lshrs.src new file mode 100644 index 0000000..a8a35d1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lshrs.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Shift Right Signed +; Input: +; Operand1: +; AuBC : 32 bit value to be shifted by L +; +; Operand2: +; L : number of bits to shift +; +; Output: +; Result: AuBC : 32 bit +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __lshrs + .assume adl=1 + +__lshrs equ 0001E8h diff --git a/frontends/calculator/CEdev/lib/shared/lshru.src b/frontends/calculator/CEdev/lib/shared/lshru.src new file mode 100644 index 0000000..5334d7f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lshru.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Shift Right Unsigned +; Input: +; Operand1: +; AuBC : 32 bit value to be shifted by L +; +; Operand2: +; L : number of bits to shift +; +; Output: +; Result: AuBC : 32 bit +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __lshru + .assume adl=1 + +__lshru equ 0001ECh diff --git a/frontends/calculator/CEdev/lib/shared/lstix.src b/frontends/calculator/CEdev/lib/shared/lstix.src new file mode 100644 index 0000000..22c014e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lstix.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; long store (ix+nnnnnn),H:HL +; Input: +; Operand1: +; BC : 24-bit offset from ix +; E:HL : 32-bit value +; +; Output: +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __lstix + .assume adl=1 + +__lstix equ 0001F0h diff --git a/frontends/calculator/CEdev/lib/shared/lstiy.src b/frontends/calculator/CEdev/lib/shared/lstiy.src new file mode 100644 index 0000000..e141502 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lstiy.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; long store (iy+nnnnnn),E:HL +; Input: +; Operand1: +; BC : 24-bit offset from iy +; E:HL : 32-bit value +; +; Output: +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __lstiy + .assume adl=1 + +__lstiy equ 0001F4h diff --git a/frontends/calculator/CEdev/lib/shared/lsub.src b/frontends/calculator/CEdev/lib/shared/lsub.src new file mode 100644 index 0000000..ef51463 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lsub.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long Subtract Op1 - Op2 +; Input: +; Operand1: +; EHL : 32 bits +; +; Operand2: +; ABC : 32 bits +; +; Output: +; Result: EHL : 32 bits +; Registers Used: +; flags +;------------------------------------------------------------------------- + .def __lsub + .assume adl=1 + +__lsub equ 0001F8h diff --git a/frontends/calculator/CEdev/lib/shared/lxor.src b/frontends/calculator/CEdev/lib/shared/lxor.src new file mode 100644 index 0000000..c14d3cc --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/lxor.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Long XOR. +; Input: +; Operand1: +; ehl : 32 bit +; +; Operand2: +; abc : 32 bit +; +; Output: +; Result: ehl : 32 bit +; Registers Used: +; +;------------------------------------------------------------------------- + .def __lxor + .assume adl=1 + +__lxor equ 0001FCh diff --git a/frontends/calculator/CEdev/lib/shared/malloc.src b/frontends/calculator/CEdev/lib/shared/malloc.src new file mode 100644 index 0000000..2e6d2d9 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/malloc.src @@ -0,0 +1,225 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\MALLOC.C"
+ .assume ADL=1
+ SEGMENT BSS
+__alloc_base:
+ DS 6
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2011 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /* This implements a straight forward version of malloc, allocating */
+; 9 /* memory between the first unused address in RAM (__heapbot) and */
+; 10 /* the current stack pointer; the stack pointer being initialized to */
+; 11 /* the top of RAM (__heaptop). */
+; 12 /* The Zilog real time kernel, RZK, implements an entirely */
+; 13 /* different version of malloc. */
+; 14 /* */
+; 15 /* ZDS arranges that this malloc does not get linked into RZK */
+; 16 /* applications by placing the C runtime library, crt.lib or */
+; 17 /* crtD.lib, after the RZK libraries in the linker command file. */
+; 18 /* */
+; 19 /************************************************************************/
+; 20 #include <stddef.h>
+; 21 #include <stdlib.h>
+; 22
+; 23 HEADER _alloc_base; /* empty list to get started */
+ SEGMENT CODE
+; 24 extern void *_s_sbrk(size_t);
+; 25
+; 26 /*************************************************
+; 27 *
+; 28 * morecore - get more memory for heap
+; 29 *
+; 30 * Inputs:
+; 31 * nu - number of units
+; 32 *
+; 33 * Returns:
+; 34 * the address of the new memory
+; 35 *
+; 36 *************************************************/
+; 37
+; 38 static void* morecore(size_t nbytes)
+; 39 {
+_morecore:
+ LD HL,-3
+ CALL __frameset
+; 40 register void *cp;
+; 41 if(cp = _s_sbrk(nbytes))
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __s_sbrk
+ POP BC
+ LD (IX+-3),HL
+ CALL __icmpzero
+ JR Z,L_1
+; 42 {
+; 43 ((HEADER*)cp)->s.size=nbytes;
+ LD BC,(IX+6)
+ LD IY,(IX+-3)
+ LD (IY+3),BC
+; 44 cp = ((HEADER*)cp) + 1;
+ LEA IY,IY+6
+ LD (IX+-3),IY
+; 45 }
+L_1:
+; 46 return(cp);
+ LD HL,(IX+-3)
+; 47 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _morecore ***************************
+;Name Addr/Register Size Type
+;__s_sbrk IMPORT ----- function
+;cp IX-3 3 variable
+;nbytes IX+6 3 parameter
+
+
+; Stack Frame Size: 12 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 48
+; 49 /*************************************************
+; 50 *
+; 51 * malloc - allocate heap storage
+; 52 *
+; 53 * Inputs:
+; 54 * nbytes - number of bytes to allocate
+; 55 *
+; 56 * Returns:
+; 57 * the address of the memory or NULL
+; 58 *
+; 59 *************************************************/
+; 60
+; 61 void *malloc(size_t nbytes)
+; 62 {
+_malloc:
+ LD HL,-9
+ CALL __frameset
+; 63 HEADER *p,*q;
+; 64 size_t size = nbytes + sizeof(HEADER);
+ LD IY,(IX+6)
+ LEA IY,IY+6
+ LD (IX+-6),IY
+; 65
+; 66 if (size < nbytes)
+ LD BC,(IX+6)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_11
+ OR A,A
+; 67 return NULL; // Happens on malloc(-1) or like stupidity
+ SBC HL,HL
+ JR L_13
+L_11:
+; 68
+; 69 for(p=&_alloc_base; q=p->s.ptr; p=q)
+ LD BC,__alloc_base
+ LD (IX+-9),BC
+ JR L_10
+L_8:
+; 70 {
+; 71 if (q->s.size >= size)
+ LD BC,(IX+-6)
+ LD IY,(IX+-3)
+ LD HL,(IY+3)
+ OR A,A
+ SBC HL,BC
+ JR C,L_9
+; 72 {
+; 73 /* big enough */
+; 74 if (q->s.size <= size+sizeof(HEADER))
+ LD IY,(IX+-6)
+ LEA HL,IY+6
+ LD IY,(IX+-3)
+ LD BC,(IY+3)
+ OR A,A
+ SBC HL,BC
+ JR C,L_5
+; 75 {
+; 76 /* exactly enough */
+; 77 p->s.ptr = q->s.ptr;
+ LD IY,(IX+-3)
+ LD BC,(IY+0)
+ LD IY,(IX+-9)
+ LD (IY+0),BC
+; 78 }
+; 79 else
+ JR L_6
+L_5:
+; 80 {
+; 81 q->s.size -= size;
+ LD IY,(IX+-3)
+ LD HL,(IY+3)
+ LD BC,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ LD (IY+3),HL
+; 82 q = (HEADER*)(((char*)q) + q->s.size);
+ LD BC,(IY+3)
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD (IX+-3),HL
+; 83 q->s.size = size;
+ LD BC,(IX+-6)
+ LD IY,(IX+-3)
+ LD (IY+3),BC
+; 84 }
+L_6:
+; 85 return((void*)(q+1));
+ LD IY,(IX+-3)
+ LEA HL,IY+6
+ JR L_13
+; 86 }
+; 87 }
+L_9:
+ LD BC,(IX+-3)
+ LD (IX+-9),BC
+L_10:
+ LD IY,(IX+-9)
+ LD BC,(IY+0)
+ LD (IX+-3),BC
+ LD HL,BC
+ CALL __icmpzero
+ JR NZ,L_8
+; 88 return(morecore(size));
+ LD BC,(IX+-6)
+ PUSH BC
+ CALL _morecore
+ POP BC
+; 89 }
+L_13:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _malloc ***************************
+;Name Addr/Register Size Type
+;__alloc_base STATIC 6 variable
+;p IX-9 3 variable
+;size IX-6 3 variable
+;q IX-3 3 variable
+;nbytes IX+6 3 parameter
+
+
+; Stack Frame Size: 18 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __s_sbrk:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XDEF _malloc
+ XDEF __alloc_base
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/maptab.src b/frontends/calculator/CEdev/lib/shared/maptab.src new file mode 100644 index 0000000..8ec2d12 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/maptab.src @@ -0,0 +1,158 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\MAPTAB.C"
+ .assume ADL=1
+ SEGMENT DATA
+___maptab:
+ DB 128
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 96
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 24
+ DB 24
+ DB 24
+ DB 24
+ DB 24
+ DB 24
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 8
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 20
+ DB 20
+ DB 20
+ DB 20
+ DB 20
+ DB 20
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 4
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ DB 2
+ XDEF ___maptab
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2008 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /************************************************************************/
+; 9
+; 10 /* Mapping table for isxxx functions */
+; 11
+; 12 #define CTL 0x80 /* control character */
+; 13 #define WS 0x40 /* whitespace character */
+; 14 #define SP 0x20 /* space character */
+; 15 #define HEX 0x10 /* hex digit (A-Z,a-z) */
+; 16 #define UC 0x08 /* uppercase letter */
+; 17 #define LC 0x04 /* lowercase letter */
+; 18 #define PUN 0x02 /* punctuation */
+; 19 #define DIG 0x01 /* decimal digit (0-9) */
+; 20
+; 21 __rom unsigned char __maptab[128] = {
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/memchr.src b/frontends/calculator/CEdev/lib/shared/memchr.src new file mode 100644 index 0000000..1dec0c8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/memchr.src @@ -0,0 +1,6 @@ + .def _memchr + .assume adl=1 + +; void *memchr(const void *buf, int c, size_t count); + +_memchr equ 00009Ch diff --git a/frontends/calculator/CEdev/lib/shared/memcmp.src b/frontends/calculator/CEdev/lib/shared/memcmp.src new file mode 100644 index 0000000..4658030 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/memcmp.src @@ -0,0 +1,6 @@ + .def _memcmp + .assume adl=1 + +; int memcmp(const void *buf1, const void *buf2, size_t count); + +_memcmp equ 0000A0h diff --git a/frontends/calculator/CEdev/lib/shared/memcpy.src b/frontends/calculator/CEdev/lib/shared/memcpy.src new file mode 100644 index 0000000..9ecc289 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/memcpy.src @@ -0,0 +1,6 @@ + .def _memcpy + .assume adl=1 + +; void *memcpy( void *dest, const void *src, size_t count ); + +_memcpy equ 0000A4h diff --git a/frontends/calculator/CEdev/lib/shared/memmove.src b/frontends/calculator/CEdev/lib/shared/memmove.src new file mode 100644 index 0000000..4a219cd --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/memmove.src @@ -0,0 +1,6 @@ + .def _memmove + .assume adl=1 + +; void *memmove(void *dest, const void *src, size_t count); + +_memmove equ 0000A8h diff --git a/frontends/calculator/CEdev/lib/shared/memset.src b/frontends/calculator/CEdev/lib/shared/memset.src new file mode 100644 index 0000000..2ff1317 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/memset.src @@ -0,0 +1,26 @@ + .def _memset + .assume adl=1 + +; void *memset(void *dest, int c, size_t count); + +_memset: + pop iy + pop hl + pop de + pop bc + push bc + push de + push hl + push iy + cpi + add hl,bc + ret c + dec hl + ld (hl),e + ret po + push hl + pop de + dec de + lddr + ret + diff --git a/frontends/calculator/CEdev/lib/shared/os.src b/frontends/calculator/CEdev/lib/shared/os.src new file mode 100644 index 0000000..23e0852 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/os.src @@ -0,0 +1,14 @@ +; --- +; call an os or bootcode routine +; --- + + .def __OS + .assume adl=1 + +__OS: + pop de + pop hl + push hl + push de + ld iy,13631616 + jp (hl) diff --git a/frontends/calculator/CEdev/lib/shared/os_textbuffer.src b/frontends/calculator/CEdev/lib/shared/os_textbuffer.src new file mode 100644 index 0000000..0f3c106 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/os_textbuffer.src @@ -0,0 +1,22 @@ +; --- +; enables / disables homescreen text buffering which can destroy bss / heap +; --- + + .def _os_DisableHomeTextBuffer + .def _os_EnableHomeTextBuffer + .assume adl=1 + +_os_DisableHomeTextBuffer: + ld iy,$d00080 + res 1,(iy + $0d) ; no text buffer + res 3,(iy + $4a) ; use first shadow buffer + set 5,(iy + $4c) ; only display + ret + +_os_EnableHomeTextBuffer: + ld iy,$d00080 + set 1,(iy + $0d) ; use text buffer + res 3,(iy + $4a) ; use first shadow buffer + res 5,(iy + $4c) ; use shadow buffer + ret + diff --git a/frontends/calculator/CEdev/lib/shared/print_globals.src b/frontends/calculator/CEdev/lib/shared/print_globals.src new file mode 100644 index 0000000..fa4f532 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/print_globals.src @@ -0,0 +1,47 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\PRINT_GLOBALS.C"
+ .assume ADL=1
+ SEGMENT BSS
+___print_buff:
+ DS 14
+___print_fmt:
+ DS 19
+___print_len:
+ DS 1
+___print_leading_char:
+ DS 1
+___print_out:
+ DS 3
+ SEGMENT DATA
+___print_xputch:
+ DW24 ___print_sputch
+ XREF ___print_sputch:ROM
+ XDEF ___print_xputch
+ XDEF ___print_out
+ XDEF ___print_leading_char
+ XDEF ___print_len
+ XDEF ___print_fmt
+ XDEF ___print_buff
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5 #include <format.h>
+; 6
+; 7 void __print_sputch(char ch);
+; 8
+; 9 /* Global data used by the printf support functions. */
+; 10 /* The compiler may manipulate this data directly to bypass the runtime */
+; 11 /* parsing of (s)printf formats. */
+; 12 char __print_buff[14];
+; 13 struct fmt_type __print_fmt;
+; 14 unsigned char __print_len;
+; 15 char __print_leading_char; // Initial +, -, or space for number
+; 16 char *__print_out;
+; 17
+; 18 // This points to __print_sputch except when printf is active.
+; 19 // This is so that the more commonly used function does not need to set it.
+; 20 void (*__print_xputch)(char) = __print_sputch;
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/print_putch.src b/frontends/calculator/CEdev/lib/shared/print_putch.src new file mode 100644 index 0000000..d4ea5c2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/print_putch.src @@ -0,0 +1,51 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\PRINT_PUTCH.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5 #include <format.h>
+; 6 #include <string.h>
+; 7 #include <stdlib.h>
+; 8
+; 9 extern void (*__print_xputch)(char);
+; 10
+; 11 /* Send a character to the printf/sprintf destination */
+; 12 /* The compiler may generate direct calls to this to bypass the runtime */
+; 13 /* parsing of printf formats. */
+; 14
+; 15 void __print_putch(char ch) {
+___print_putch:
+ CALL __frameset0
+; 16 (*__print_xputch)(ch);
+ LD C,(IX+6)
+ LD B,0
+ PUSH BC
+ LD IY,(___print_xputch)
+ CALL __indcall
+ POP BC
+; 17 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** ___print_putch ***************************
+;Name Addr/Register Size Type
+;___print_xputch IMPORT 3 variable
+;ch IX+6 1 parameter
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF ___print_xputch:ROM
+ XREF __indcall:ROM
+ XREF __frameset0:ROM
+ XDEF ___print_putch
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/print_putstring.src b/frontends/calculator/CEdev/lib/shared/print_putstring.src new file mode 100644 index 0000000..011e001 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/print_putstring.src @@ -0,0 +1,246 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\PRINT_PUTSTRING.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5 #include <format.h>
+; 6 #include <string.h>
+; 7 #include <stdlib.h>
+; 8
+; 9 /* Send a string to the printf/sprintf destination */
+; 10 /* The compiler may generate direct calls to this to bypass the runtime */
+; 11 /* parsing of printf formats. */
+; 12
+; 13 void __print_putch(char ch);
+; 14
+; 15 void __print_sendstring(char *sp)
+; 16 {
+___print_sendstring:
+ LD HL,-16
+ CALL __frameset
+; 17 unsigned char i = 0;
+ LD (IX+-1),0
+; 18 unsigned short j, jmax;
+; 19 char* s = sp;
+ LD BC,(IX+6)
+ LD (IX+-8),BC
+; 20 char padRight = 0;
+ LD (IX+-5),0
+; 21 if (__print_fmt.field_width != 0)
+ LD A,(___print_fmt+5)
+ OR A,A
+ JR Z,L_16
+; 22 {
+; 23 padRight = ((__print_fmt.flags & FMT_FLAG_MINUS) || __print_fmt.field_width < 0);
+ LD A,(___print_fmt+1)
+ AND A,1
+ JR NZ,L_1
+ LD A,(___print_fmt+5)
+ OR A,A
+ JP P,L_2
+L_1:
+ LD BC,1
+ LD (IX+-13),BC
+ JR L_3
+L_2:
+ LD BC,0
+ LD (IX+-13),BC
+L_3:
+ LD A,(IX+-13)
+ LD (IX+-5),A
+; 24 if (!padRight)
+ OR A,A
+ JR NZ,L_16
+; 25 {
+; 26 char pad = strlen(s);
+ LD BC,(IX+6)
+ PUSH BC
+ CALL _strlen
+ POP BC
+ LD (IX+-2),L
+; 27 if (__print_fmt.flags & FMT_FLAG_PRECISION && pad > __print_fmt.precision)
+ LD A,(___print_fmt+1)
+ AND A,16
+ JR Z,L_7
+ LD A,(___print_fmt+6)
+ CP A,(IX+-2)
+ JP P,L_7
+; 28 pad = __print_fmt.precision;
+ LD A,(___print_fmt+6)
+ LD (IX+-2),A
+L_7:
+; 29
+; 30 pad = __print_fmt.field_width-pad;
+ LD A,(___print_fmt+5)
+ SUB A,(IX+-2)
+ LD (IX+-2),A
+; 31 while(pad > 0)
+ JR L_10
+L_11:
+; 32 {
+; 33 __print_putch(' ');
+ LD BC,32
+ PUSH BC
+ CALL ___print_putch
+ POP BC
+; 34 i++;
+ INC (IX+-1)
+; 35 pad--;
+ DEC (IX+-2)
+; 36 }
+L_10:
+ XOR A,A
+ CP A,(IX+-2)
+ CALL __setflag
+ JP M,L_11
+; 37 }
+; 38 }
+L_16:
+; 39 /* If precision not specified, make it 127 */
+; 40 if (!(__print_fmt.flags & FMT_FLAG_PRECISION))
+ LD A,(___print_fmt+1)
+ AND A,16
+ JR NZ,L_15
+; 41 jmax = 0xffff;
+ LD (IX+-10),255
+ LD (IX+-9),255
+; 42 else
+ JR L_23
+L_15:
+; 43 jmax = (unsigned)__print_fmt.precision;
+ LD A,(___print_fmt+6)
+ LD B,A
+ SEXT HL
+ LD (IX+-10),B
+ LD (IX+-9),H
+L_23:
+; 44
+; 45 for (j=0;j<jmax && *s;j++)
+ LD (IX+-4),0
+ LD (IX+-3),0
+ JR L_22
+L_20:
+; 46 __print_putch(*s++);
+ LD BC,(IX+-8)
+ LD (IX+-16),BC
+ LD BC,(IX+-8)
+ INC BC
+ LD (IX+-8),BC
+ LD HL,(IX+-16)
+ LD C,(HL)
+ LD B,0
+ PUSH BC
+ CALL ___print_putch
+ POP BC
+ LD HL,(IX+-4)
+ INC HL
+ LD (IX+-4),L
+ LD (IX+-3),H
+L_22:
+ LD BC,(IX+-10)
+ LD HL,(IX+-4)
+ OR A,A
+ SBC.SIS HL,BC
+ JR NC,L_24
+ LD HL,(IX+-8)
+ LD A,(HL)
+ OR A,A
+ JR NZ,L_20
+L_24:
+; 47 i += j;
+ LD A,(IX+-4)
+ ADD A,(IX+-1)
+ LD (IX+-1),A
+; 48 if (padRight)
+ LD A,(IX+-5)
+ OR A,A
+ JR Z,L_29
+; 49 {
+; 50 __print_fmt.field_width = abs(__print_fmt.field_width);
+ LD A,(___print_fmt+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _abs
+ POP BC
+ LD A,L
+ LD (___print_fmt+5),A
+; 51 while (i < __print_fmt.field_width)
+ JR L_26
+L_27:
+; 52 {
+; 53 __print_putch(' ');
+ LD BC,32
+ PUSH BC
+ CALL ___print_putch
+ POP BC
+; 54 i++;
+ INC (IX+-1)
+; 55 }
+L_26:
+ LD A,(___print_fmt+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-1)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP M,L_27
+; 56 }
+L_29:
+; 57 __print_len += i;
+ LD A,(___print_len)
+ ADD A,(IX+-1)
+ LD (___print_len),A
+; 58 /* Reset the data manipulated by the compiler, so that no code is needed */
+; 59 /* to set default values. */
+; 60 __print_fmt.field_width= __print_fmt.precision= __print_fmt.flags= 0;
+ XOR A,A
+ LD (___print_fmt+1),A
+ LD (___print_fmt+6),A
+ LD (___print_fmt+5),A
+; 61 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** ___print_sendstring ***************************
+;Name Addr/Register Size Type
+;___print_len IMPORT 1 variable
+;_abs IMPORT ----- function
+;___print_putch IMPORT ----- function
+;_strlen IMPORT ----- function
+;___print_fmt IMPORT 19 variable
+;temp4 IX-13 3 variable
+;jmax IX-10 2 variable
+;s IX-8 3 variable
+;padRight IX-5 1 variable
+;j IX-4 2 variable
+;pad IX-2 1 variable
+;i IX-1 1 variable
+;sp IX+6 3 parameter
+
+
+; Stack Frame Size: 25 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF ___print_putch:ROM
+ XREF _strlen:ROM
+ XREF ___print_len:ROM
+ XREF ___print_fmt:ROM
+ XREF _abs:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XDEF ___print_sendstring
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/print_sputch.src b/frontends/calculator/CEdev/lib/shared/print_sputch.src new file mode 100644 index 0000000..4622bb4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/print_sputch.src @@ -0,0 +1,46 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\PRINT_SPUTCH.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5 #include <format.h>
+; 6
+; 7 /* Send a character to the sprintf destination */
+; 8
+; 9 extern char *__print_out;
+; 10
+; 11 void __print_sputch(char ch) {
+___print_sputch:
+ CALL __frameset0
+; 12 *__print_out++ = ch;
+ LD HL,(___print_out)
+ LD A,(IX+6)
+ LD (HL),A
+ LD BC,(___print_out)
+ INC BC
+ LD (___print_out),BC
+; 13 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** ___print_sputch ***************************
+;Name Addr/Register Size Type
+;___print_out IMPORT 3 variable
+;ch IX+6 1 parameter
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF ___print_out:ROM
+ XREF __frameset0:ROM
+ XDEF ___print_sputch
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/qsort.src b/frontends/calculator/CEdev/lib/shared/qsort.src new file mode 100644 index 0000000..675dff9 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/qsort.src @@ -0,0 +1,378 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\QSORT.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2008 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /************************************************************************/
+; 9 #include <stddef.h>
+; 10 #include <stdlib.h>
+; 11
+; 12 /*************************************************
+; 13 *
+; 14 * qsort - Quick sort
+; 15 *
+; 16 * Inputs:
+; 17 * base - base of array to be sorted
+; 18 * nel - number of elements
+; 19 * size - size of each element
+; 20 * compar - pointer to function for comparison
+; 21 *
+; 22 * Returns:
+; 23 * nothing
+; 24 *
+; 25 *************************************************/
+; 26 static void swapmem(char *a,char *b,size_t size)
+; 27 {
+_swapmem:
+ LD HL,-4
+ CALL __frameset
+; 28 register char t;
+; 29 register size_t i;
+; 30
+; 31 for (i=0;i<size;++i,++b,++a) {
+ LD BC,0
+ LD (IX+-4),BC
+ JR L_2
+L_0:
+; 32 t = *a;
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD (IX+-1),A
+; 33 *a = *b;
+ LD HL,(IX+9)
+ LD A,(HL)
+ LD HL,(IX+6)
+ LD (HL),A
+; 34 *b = t;
+ LD HL,(IX+9)
+ LD A,(IX+-1)
+ LD (HL),A
+ LD BC,(IX+-4)
+ INC BC
+ LD (IX+-4),BC
+ LD BC,(IX+9)
+ INC BC
+ LD (IX+9),BC
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 35 }
+L_2:
+ LD BC,(IX+12)
+ LD HL,(IX+-4)
+ OR A,A
+ SBC HL,BC
+ JR C,L_0
+; 36 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _swapmem ***************************
+;Name Addr/Register Size Type
+;i IX-4 3 variable
+;t IX-1 1 variable
+;size IX+12 3 parameter
+;b IX+9 3 parameter
+;a IX+6 3 parameter
+
+
+; Stack Frame Size: 19 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 37
+; 38 struct stk {
+; 39 char *l;
+; 40 char *r;
+; 41 };
+; 42
+; 43 void qsort( char *base,
+; 44 size_t nel,
+; 45 size_t size,
+; 46 int (*compar)(void *,void *))
+; 47 {
+_qsort:
+ LD HL,-111
+ CALL __frameset
+; 48 char *i;
+; 49 char *j;
+; 50 char *x;
+; 51 char *r;
+; 52 struct stk *sp;
+; 53 struct stk stack[16];
+; 54
+; 55 sp = stack;
+ LEA BC,IX+-111
+ LD (IX+-9),BC
+; 56 r = base + (nel-1)*size;
+ LD IY,(IX+9)
+ LD BC,(IX+12)
+ LD DE,(IX+6)
+ LEA HL,IY+-1
+ CALL __imulu
+ ADD HL,DE
+ LD (IX+-12),HL
+; 57 for (;;) {
+; 58 do {
+L_25:
+; 59 x = base + (r-base)/size/2 * size;
+ LD BC,(IX+6)
+ LD HL,(IX+-12)
+ OR A,A
+ SBC HL,BC
+ LD BC,(IX+12)
+ CALL __idivu
+ LD A,1
+ CALL __ishru_b
+ LD BC,(IX+12)
+ CALL __imulu
+ LD BC,(IX+6)
+ ADD HL,BC
+ LD (IX+-15),HL
+; 60 i = base;
+ LD BC,(IX+6)
+ LD (IX+-3),BC
+; 61 j = r;
+ LD BC,(IX+-12)
+ LD (IX+-6),BC
+; 62 do {
+; 63 while ((*compar)(i,x) < 0)
+ JR L_4
+L_5:
+; 64 i += size;
+ LD BC,(IX+12)
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD (IX+-3),HL
+L_4:
+ LD IY,(IX+15)
+ LD BC,(IX+-15)
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL __indcall
+ POP BC
+ POP BC
+ CALL __icmpzero
+ CALL __setflag
+ JP M,L_5
+; 65 while ((*compar)(x,j) < 0)
+ JR L_6
+L_7:
+; 66 j -= size;
+ LD BC,(IX+12)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ LD (IX+-6),HL
+L_6:
+ LD IY,(IX+15)
+ LD BC,(IX+-6)
+ PUSH BC
+ LD BC,(IX+-15)
+ PUSH BC
+ CALL __indcall
+ POP BC
+ POP BC
+ CALL __icmpzero
+ CALL __setflag
+ JP M,L_7
+; 67 if (i < j) {
+ LD BC,(IX+-6)
+ LD HL,(IX+-3)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_15
+; 68 swapmem(i, j, size);
+ LD BC,(IX+12)
+ PUSH BC
+ LD BC,(IX+-6)
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _swapmem
+ POP BC
+ POP BC
+ POP BC
+; 69 if (i == x)
+ LD BC,(IX+-15)
+ LD HL,(IX+-3)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_11
+; 70 x = j;
+ LD BC,(IX+-6)
+ LD (IX+-15),BC
+; 71 else if (j == x)
+ JR L_15
+L_11:
+ LD BC,(IX+-15)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_15
+; 72 x = i;
+ LD BC,(IX+-3)
+ LD (IX+-15),BC
+; 73 }
+L_15:
+; 74 if (i <= j) {
+ LD BC,(IX+-3)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ JR C,L_17
+; 75 i += size;
+ LD BC,(IX+12)
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD (IX+-3),HL
+; 76 j -= size;
+ LD BC,(IX+12)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ LD (IX+-6),HL
+; 77 }
+; 78 } while (i <= j);
+L_17:
+ LD BC,(IX+-3)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_4
+; 79 if (j-base < r-i) {
+ LD BC,(IX+6)
+ LD HL,(IX+-6)
+ OR A,A
+ SBC HL,BC
+ LD DE,HL
+ LD HL,(IX+-12)
+ OR A,A
+ LD BC,(IX+-3)
+ SBC HL,BC
+ LD BC,HL
+ LD HL,DE
+ OR A,A
+ SBC HL,BC
+ CALL __setflag
+ JP P,L_23
+; 80 if (i < r) { /* stack request for right partition */
+ LD BC,(IX+-12)
+ LD HL,(IX+-3)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_19
+; 81 sp->l = i;
+ LD BC,(IX+-3)
+ LD IY,(IX+-9)
+ LD (IY+0),BC
+; 82 sp->r = r;
+ LD BC,(IX+-12)
+ LD (IY+3),BC
+; 83 ++sp;
+ LEA IY,IY+6
+ LD (IX+-9),IY
+; 84 }
+L_19:
+; 85 r = j; /* continue sorting left partition */
+ LD BC,(IX+-6)
+ LD (IX+-12),BC
+; 86 }
+; 87 else {
+ JR L_26
+L_23:
+; 88 if (base < j) { /* stack request for left partition */
+ LD BC,(IX+-6)
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_21
+; 89 sp->l = base;
+ LD BC,(IX+6)
+ LD IY,(IX+-9)
+ LD (IY+0),BC
+; 90 sp->r = j;
+ LD BC,(IX+-6)
+ LD (IY+3),BC
+; 91 ++sp;
+ LEA IY,IY+6
+ LD (IX+-9),IY
+; 92 }
+L_21:
+; 93 base = i; /* continue sorting right partition */
+ LD BC,(IX+-3)
+ LD (IX+6),BC
+; 94 }
+; 95 } while (base < r);
+L_26:
+ LD BC,(IX+-12)
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR C,L_25
+; 96
+; 97 if (sp <= stack)
+ LD BC,(IX+-9)
+ LEA HL,IX+-111
+ OR A,A
+ SBC HL,BC
+ JR NC,L_32
+; 98 break;
+; 99 --sp;
+ LD IY,(IX+-9)
+ LEA BC,IY+-6
+ LD (IX+-9),BC
+; 100 base = sp->l;
+ LD IY,(IX+-9)
+ LD BC,(IY+0)
+ LD (IX+6),BC
+; 101 r = sp->r;
+ LD BC,(IY+3)
+ LD (IX+-12),BC
+; 102 }
+ JR L_25
+; 103 }
+L_32:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _qsort ***************************
+;Name Addr/Register Size Type
+;stack IX-111 96 variable
+;x IX-15 3 variable
+;r IX-12 3 variable
+;sp IX-9 3 variable
+;j IX-6 3 variable
+;i IX-3 3 variable
+;compar IX+15 3 parameter
+;size IX+12 3 parameter
+;nel IX+9 3 parameter
+;base IX+6 3 parameter
+
+
+; Stack Frame Size: 129 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __indcall:ROM
+ XREF __idivu:ROM
+ XREF __imulu:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XREF __icmpzero:ROM
+ XREF __ishru_b:ROM
+ XDEF _qsort
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/rand.src b/frontends/calculator/CEdev/lib/shared/rand.src new file mode 100644 index 0000000..ea569cf --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/rand.src @@ -0,0 +1,13 @@ + .ref _random + .def _rand + .assume adl=1 + +; int rand(void); + +_rand: + call _random + ld de,8388608 + sbc hl,de + ret p + add hl,de + ret diff --git a/frontends/calculator/CEdev/lib/shared/random.src b/frontends/calculator/CEdev/lib/shared/random.src new file mode 100644 index 0000000..ede9051 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/random.src @@ -0,0 +1,110 @@ +; --- +; uint32_t random(void) +; --- + + .def _random + .def __state + .assume adl=1 + +; https://github.com/MersenneTwister-Lab/XSadd/blob/master/xsadd.h#L75 +; using shift parameters (19, 21, 8) instead of (15, 18, 11) + +; uint32_t xsadd(uint32_t state[static 4]) +; { +; uint32_t s0, s1, s2, t0, t1, t2, t3, z, result; +; t0 = state[0]; +; state[0] = state[1]; state[1] = state[2]; state[2] = state[3]; +; s0 = t0 << 19; +; t1 = t0 ^ s0; +; s1 = t1 >> 21; +; t2 = t1 ^ s1; +; z = state[3]; +; s2 = z << 8; +; t3 = t2 ^ s2; +; state[3] = t3; +; result = t3 + state[2]; +; return result; +; } + + segment data +__state: + dl 0d0e0f10h,090a0b0ch,05060708h,01020304h + + segment code +_random: +; Read state[0] and perform state shifting. + ld iy,__state ; iy = &state[0] + ld hl,(iy+0*4+0) ; hl = hl(state[0]) + push hl + ld hl,(iy+0*4+2) ; hl = eu(state[0]) + push hl + lea hl,iy+1*4 ; hl = &state[1] + lea de,iy+0*4 ; de = &state[0] + ld bc,3*4 + ldir ; state[0] = state[1] + ; state[1] = state[2] + ; state[2] = state[3] + pop bc + pop de ; bcde = state[0] == t0 +; +; s0 = t0 << 19 ==> s0h == 0 ==> t1h = t0h +; s0l == 0 ==> t1l = t0l +; +; s1 = t1 >> 21 ==> s1e == 0 ==> t2e = t1e +; s1u == 0 ==> t2u = t1u +; +; s2 = z << 8 ==> s2e == zu ==> t3e == t2e ^ s2e == t1e ^ s2e == t0e ^ s0e ^ s2e +; s2u == zh ==> t3u == t2u ^ s2u == t1u ^ s2u == t0u ^ s0u ^ s2u +; s2h == zl ==> t3h == t2h ^ s2h == t1h ^ s1h ^ s2h == t0h ^ s1h ^ s2h +; s2l == 0 ==> t3l == t2l == t1l ^ s1l == t0l ^ s1l +; +; Calculate s0. + ld h,d + ld l,e ; hl = t0hl == t0 << 16 + add hl,hl + add hl,hl + add hl,hl ; hl = t0 << 19 = s0eu + ; h = s0e + ; l = s0u +; Calculate t1e and t3e. + ld a,b ; a = t0e + xor a,h ; a = t0e ^ s0e == t1e + ld h,a ; h = t1e + xor a,(iy+3*4+2) ; a = t1e ^ zu == t2e ^ s2e == t3e + ld (iy+3*4+3),a ; e(state[3]) = t3e + ld b,a ; b = t3e +; Calculate t1u and t3u. + ld a,c ; a = t0u + xor a,l ; a = t0u ^ s0u == t1u + ld l,a ; l = t1u + ; hl = t1eu == t1 >> 16 + xor a,(iy+3*4+1) ; a = t1u ^ zh == t2u ^ s2u == t3u + ld (iy+3*4+2),a ; u(state[3]) = t3u +; Calculate s1. + xor a,a ; a = 0 + add.s hl,hl + adc a,a + add.s hl,hl + adc a,a + add.s hl,hl + adc a,a ; ahl = (t1 >> 16) << 3 + ; ah = ((t1 >> 16) << 3) >> 8 == t1 >> 21 == s1hl + ; a = s1h + ; h = s1l +; Calculate t3h. + xor a,d ; a = s1h ^ t0h === s1h ^ t1h == t2h + xor a,(iy+3*4+0) ; a = t2h ^ zl == t2h ^ s2h == t3h + ld (iy+3*4+1),a ; h(state[3]) = t3h +; Calculate t3l. + ld a,e ; a = t0l == t1l + xor a,h ; a = t1l ^ s1l == t2l == t3l + ld (iy+3*4+0),a ; l(state[3]) = t3l +; Calculate result. + ld hl,(iy+3*4) + ld a,b ; auhl = t3 + ld de,(iy+2*4) + ld c,(iy+2*4+3) ; cude = state[2] + add hl,de + adc a,c ; auhl = t3 + state[2] = result + ld e,a ; euhl = result + ret diff --git a/frontends/calculator/CEdev/lib/shared/realloc.src b/frontends/calculator/CEdev/lib/shared/realloc.src new file mode 100644 index 0000000..a3d26fd --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/realloc.src @@ -0,0 +1,125 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\REALLOC.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2008 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /************************************************************************/
+; 9 #include <stddef.h>
+; 10 #include <string.h>
+; 11 #include <stdlib.h>
+; 12 #include <format.h>
+; 13
+; 14 /*************************************************
+; 15 *
+; 16 * realloc - change the size of an allocated block
+; 17 *
+; 18 * Inputs:
+; 19 * ptr - pointer to allocated memory
+; 20 * size - new size of memory
+; 21 *
+; 22 * Returns:
+; 23 * pointer to block - may have changed
+; 24 *
+; 25 *************************************************/
+; 26 void *realloc(void *ptr,size_t size) {
+_realloc:
+ LD HL,-6
+ CALL __frameset
+; 27 HEADER *h;
+; 28 void *p;
+; 29
+; 30 if (ptr) {
+ LD HL,(IX+6)
+ CALL __icmpzero
+ JR Z,L_5
+; 31 h = (HEADER *)((char *)ptr - sizeof(HEADER));
+ LD IY,(IX+6)
+ LEA BC,IY+-6
+ LD (IX+-6),BC
+; 32 if (h->s.size >= (size+sizeof(HEADER))) {
+ LD IY,(IX+9)
+ LEA BC,IY+6
+ LD IY,(IX+-6)
+ LD HL,(IY+3)
+ OR A,A
+ SBC HL,BC
+ JR C,L_2
+; 33 return(ptr);
+ LD HL,(IX+6)
+ JR L_6
+; 34 }
+L_2:
+; 35
+; 36 if (p = malloc(size)) {
+ LD BC,(IX+9)
+ PUSH BC
+ CALL _malloc
+ POP BC
+ LD (IX+-3),HL
+ CALL __icmpzero
+ JR Z,L_3
+; 37 memcpy(p,ptr,size);
+ LD BC,(IX+9)
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _memcpy
+ POP BC
+ POP BC
+ POP BC
+; 38 free(ptr);
+ LD BC,(IX+6)
+ PUSH BC
+ CALL _free
+ POP BC
+; 39 }
+L_3:
+; 40 return(p);
+ LD HL,(IX+-3)
+ JR L_6
+; 41 }
+L_5:
+; 42 return(malloc(size));
+ LD BC,(IX+9)
+ PUSH BC
+ CALL _malloc
+ POP BC
+; 43 }
+L_6:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _realloc ***************************
+;Name Addr/Register Size Type
+;_free IMPORT ----- function
+;_memcpy IMPORT ----- function
+;_malloc IMPORT ----- function
+;h IX-6 3 variable
+;p IX-3 3 variable
+;size IX+9 3 parameter
+;ptr IX+6 3 parameter
+
+
+; Stack Frame Size: 18 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _free:ROM
+ XREF _malloc:ROM
+ XREF _memcpy:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XDEF _realloc
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/removeallbreakpoints.src b/frontends/calculator/CEdev/lib/shared/removeallbreakpoints.src new file mode 100644 index 0000000..ddae792 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/removeallbreakpoints.src @@ -0,0 +1,12 @@ +; --- +; remove all breakpoints +; --- + + .def _dbg_RemoveAllBreakpoints + .assume adl=1 + +_dbg_RemoveAllBreakpoints: + scf + sbc hl,hl + ld (hl),9 + ret diff --git a/frontends/calculator/CEdev/lib/shared/removeallwatchpoints.src b/frontends/calculator/CEdev/lib/shared/removeallwatchpoints.src new file mode 100644 index 0000000..7171ba4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/removeallwatchpoints.src @@ -0,0 +1,12 @@ +; --- +; remove all watchpoints +; --- + + .def _dbg_RemoveAllWatchpoints + .assume adl=1 + +_dbg_RemoveAllWatchpoints: + scf + sbc hl,hl + ld (hl),10 + ret diff --git a/frontends/calculator/CEdev/lib/shared/removebreakpoint.src b/frontends/calculator/CEdev/lib/shared/removebreakpoint.src new file mode 100644 index 0000000..d2c4b9b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/removebreakpoint.src @@ -0,0 +1,16 @@ +; --- +; remove breakpoint +; --- + + .def _dbg_RemoveBreakpoint + .assume adl=1 + +_dbg_RemoveBreakpoint: + pop hl + pop de + push de + push hl + scf + sbc hl,hl + ld (hl),4 + ret diff --git a/frontends/calculator/CEdev/lib/shared/removewatchpoint.src b/frontends/calculator/CEdev/lib/shared/removewatchpoint.src new file mode 100644 index 0000000..a096d15 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/removewatchpoint.src @@ -0,0 +1,16 @@ +; --- +; remove watchpoint +; --- + + .def _dbg_RemoveWatchpoint + .assume adl=1 + +_dbg_RemoveWatchpoint: + pop hl + pop de + push de + push hl + scf + sbc hl,hl + ld (hl),8 + ret diff --git a/frontends/calculator/CEdev/lib/shared/round.src b/frontends/calculator/CEdev/lib/shared/round.src new file mode 100644 index 0000000..e78e237 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/round.src @@ -0,0 +1,44 @@ + .def _round + .ref __frameset0 + .ref __fcmp + .ref __fadd + .ref __fsub + .ref _floor + .ref _ceil + .assume adl=1 + +_round: + call __frameset0 + ld hl,(ix+6) + ld e,(ix+9) + ld bc,0 + xor a,a + call __fcmp + push af + or a,a + sbc hl,hl + ld e,63 + ld bc,(ix+6) + pop af + ld a,(ix+9) + jp m,IsLessZero + call __fadd + or a,a + sbc hl,hl + ld l,a + push bc + push hl + call _floor + jr Finish +IsLessZero: + call __fsub + or a,a + sbc hl,hl + ld l,a + push bc + push hl + call _ceil +Finish: + ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/sand.src b/frontends/calculator/CEdev/lib/shared/sand.src new file mode 100644 index 0000000..a39e220 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sand.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short AND. +; Input: +; Operand1: +; hl : 16 bit +; +; Operand2: +; bc : 16 bit +; +; Output: +; Result: hl : 16 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __sand + .assume adl=1 + +__sand equ 000200h diff --git a/frontends/calculator/CEdev/lib/shared/sbrk.src b/frontends/calculator/CEdev/lib/shared/sbrk.src new file mode 100644 index 0000000..ab1cf1b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sbrk.src @@ -0,0 +1,49 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Heap allocation routine s_sbrk +; Input: +; argument : 24 bit - number of bytes requested +; +; Output: +; Result: HL: 24 bit address of memory allocated +; HL = 0 if no memory available + +; Registers Used: +; +;------------------------------------------------------------------------- + .assume adl=1 + .ref __heapbot + .ref __heaptop + .def __s_sbrk + + SEGMENT DATA +__sbrkbase: + .trio __heapbot + + SEGMENT CODE +__s_sbrk: + ld hl,3 + add hl,sp + ld hl,(hl) ;nbytes + ld de,(__sbrkbase) + add hl,de + jr c,_fail + + ; fail if hl >= sp. + ; hl is now, or will be, the next un-allocated address = minimal value + ; for sp that will not corrupt allocated data or that writing to + ; allocated data may corrupt the stack. + ; Actually, if hl is anywhere close to sp we're probably in trouble :( + + push hl + sbc hl,sp + pop hl + jr nc,_fail +_ok: + ex hl,de + ld (__sbrkbase),de + ret +_fail: + or a,a + sbc hl,hl + ret diff --git a/frontends/calculator/CEdev/lib/shared/scmpzero.src b/frontends/calculator/CEdev/lib/shared/scmpzero.src new file mode 100644 index 0000000..5c62a13 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/scmpzero.src @@ -0,0 +1,16 @@ +; (c) Copyright 2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Set flag for comparison of 16-bit scalar with constant value zero +; Input: +; Operand1: HL register +; +; Output: +; Result: f register +; +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __scmpzero + .assume adl=1 + +__scmpzero equ 000204h diff --git a/frontends/calculator/CEdev/lib/shared/sdivs.src b/frontends/calculator/CEdev/lib/shared/sdivs.src new file mode 100644 index 0000000..75cda77 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sdivs.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Division Signed +; Input: +; Operand1: +; hl : 16 bits x +; +; Operand2: +; bc : 16 bits y +; +; Output: +; Result: hl : 16 bits +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __sdivs + .assume adl=1 + +__sdivs equ 000208h diff --git a/frontends/calculator/CEdev/lib/shared/sdivu.src b/frontends/calculator/CEdev/lib/shared/sdivu.src new file mode 100644 index 0000000..2002728 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sdivu.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Division Unsigned +; Input: +; Operand1: +; hl : 16 bits +; +; Operand2: +; bc : 16 bits +; +; Output: +; Result: hl : 16 bits +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __sdivu + .assume adl=1 + +__sdivu equ 00020Ch + diff --git a/frontends/calculator/CEdev/lib/shared/seqcase.src b/frontends/calculator/CEdev/lib/shared/seqcase.src new file mode 100644 index 0000000..5c4a084 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/seqcase.src @@ -0,0 +1,25 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; Returns to case label +; Data at Return Address: +; DW numCases 0 +; DW24 startValue 2 +; DW24 Lab1 5 +; DW24 Lab2 8 +; ... +; DW24 defaultLab 5+3*numCases +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __seqcase + .assume adl=1 + +__seqcase equ 000210h
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/seqcased.src b/frontends/calculator/CEdev/lib/shared/seqcased.src new file mode 100644 index 0000000..d6dcea1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/seqcased.src @@ -0,0 +1,26 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; CASE branch resolution. +; +; Input: +; Operand3: +; hl : 24 bit value to match in table +; +; Output: +; Result: hl : 24 bit address of case jp to take +; Registers Used: +; +; Data at Return Address: +; JP (HL) 0 +; DW numCases 1 +; DW24 startValue 3 +; DW24 Lab1 6 +; DW24 Lab2 9 +; ... +; DW24 defaultLab 6+3*numCases +; +;------------------------------------------------------------------------- + .def __seqcaseD + .assume adl=1 + +__seqcaseD equ 000214h diff --git a/frontends/calculator/CEdev/lib/shared/setbreakpoint.src b/frontends/calculator/CEdev/lib/shared/setbreakpoint.src new file mode 100644 index 0000000..5a1e929 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setbreakpoint.src @@ -0,0 +1,16 @@ +; --- +; set breakpoint +; --- + + .def _dbg_SetBreakpoint + .assume adl=1 + +_dbg_SetBreakpoint: + pop hl + pop de + push de + push hl + scf + sbc hl,hl + ld (hl),3 + ret diff --git a/frontends/calculator/CEdev/lib/shared/setflag.src b/frontends/calculator/CEdev/lib/shared/setflag.src new file mode 100644 index 0000000..b710b95 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setflag.src @@ -0,0 +1,22 @@ +; (c) Copyright 2007-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Set Sign flag for signed comparison +; s <-- s xor v +; Input: +; Operand1: f register +; +; Output: +; Result: updated f register +; +; Registers Used: +; None +;------------------------------------------------------------------------- +; if ( V == 0) +; S = S xor 0 -> S = S +; if ( V != 0) +; S = S xor V +;------------------------------------------------------------------------- + .def __setflag + .assume adl=1 + +__setflag equ 000218h diff --git a/frontends/calculator/CEdev/lib/shared/setjmp.src b/frontends/calculator/CEdev/lib/shared/setjmp.src new file mode 100644 index 0000000..9bc7c37 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setjmp.src @@ -0,0 +1,6 @@ + .def _setjmp + .assume adl=1 + +; int setjmp(jmp_buf env); + +_setjmp equ 0000B8h diff --git a/frontends/calculator/CEdev/lib/shared/setreadwatchpoint.src b/frontends/calculator/CEdev/lib/shared/setreadwatchpoint.src new file mode 100644 index 0000000..7ada983 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setreadwatchpoint.src @@ -0,0 +1,18 @@ +; --- +; set read watchpoint +; --- + + .def _dbg_SetReadWatchpoint + .assume adl=1 + +_dbg_SetReadWatchpoint: + pop hl + pop de + pop bc + push bc + push de + push hl + scf + sbc hl,hl + ld (hl),5 + ret diff --git a/frontends/calculator/CEdev/lib/shared/setreadwritewatchpoint.src b/frontends/calculator/CEdev/lib/shared/setreadwritewatchpoint.src new file mode 100644 index 0000000..f303929 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setreadwritewatchpoint.src @@ -0,0 +1,18 @@ +; --- +; set write watchpoint +; --- + + .def _dbg_SetReadWriteWatchpoint + .assume adl=1 + +_dbg_SetReadWriteWatchpoint: + pop hl + pop de + pop bc + push bc + push de + push hl + scf + sbc hl,hl + ld (hl),7 + ret diff --git a/frontends/calculator/CEdev/lib/shared/setwatchpoint.src b/frontends/calculator/CEdev/lib/shared/setwatchpoint.src new file mode 100644 index 0000000..bf148d4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setwatchpoint.src @@ -0,0 +1,18 @@ +; --- +; set watchpoint +; --- + + .def _dbg_SetWatchpoint + .assume adl=1 + +_dbg_SetWatchpoint: + pop hl + pop de + pop bc + push bc + push de + push hl + scf + sbc hl,hl + ld (hl),11 + ret diff --git a/frontends/calculator/CEdev/lib/shared/setwritewatchpoint.src b/frontends/calculator/CEdev/lib/shared/setwritewatchpoint.src new file mode 100644 index 0000000..62bb06f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/setwritewatchpoint.src @@ -0,0 +1,18 @@ +; --- +; set write watchpoint +; --- + + .def _dbg_SetWriteWatchpoint + .assume adl=1 + +_dbg_SetWriteWatchpoint: + pop hl + pop de + pop bc + push bc + push de + push hl + scf + sbc hl,hl + ld (hl),6 + ret diff --git a/frontends/calculator/CEdev/lib/shared/sldix.src b/frontends/calculator/CEdev/lib/shared/sldix.src new file mode 100644 index 0000000..45c8006 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sldix.src @@ -0,0 +1,17 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; short load hl,(ix+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from ix +; +; Output: +; Result: hl : 16 bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __sldix + .assume adl=1 + +__sldix equ 00021Ch diff --git a/frontends/calculator/CEdev/lib/shared/sldiy.src b/frontends/calculator/CEdev/lib/shared/sldiy.src new file mode 100644 index 0000000..2a820ce --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sldiy.src @@ -0,0 +1,18 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; short load hl,(iy+nnnnnn) +; Input: +; Operand1: +; BC : 24-bit offset from iy +; +; Output: +; Result: hl : 16-bit +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __sldiy + .assume adl=1 + +__sldiy equ 000220h + diff --git a/frontends/calculator/CEdev/lib/shared/smuls.src b/frontends/calculator/CEdev/lib/shared/smuls.src new file mode 100644 index 0000000..4ac0260 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/smuls.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Multiply Signed +; Input: +; Operand1: +; bc : 16 bits +; +; Operand2: +; hl : 16 bits +; +; Output: +; Result: hl : 16 bits +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __smuls + .assume adl=1 + +__smuls equ 000224h + diff --git a/frontends/calculator/CEdev/lib/shared/smulu.src b/frontends/calculator/CEdev/lib/shared/smulu.src new file mode 100644 index 0000000..4433a62 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/smulu.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Multiply Unsigned +; Input: +; Operand1: +; BC : 16 bits +; +; Operand2: +; HL : 16 bits +; +; Output: +; Result: HL : 16 bits +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __smulu + .assume adl=1 + +__smulu equ 000228h + diff --git a/frontends/calculator/CEdev/lib/shared/sneg.src b/frontends/calculator/CEdev/lib/shared/sneg.src new file mode 100644 index 0000000..4a3fb47 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sneg.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short NEG. +; Input: +; Operand1: +; hl : 16 bit +; +; Output: +; Result: hl : 16 bit +; Registers Used: +; None +;------------------------------------------------------------------------- + .def __sneg + .assume adl=1 + +__sneg equ 00022Ch
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/snot.src b/frontends/calculator/CEdev/lib/shared/snot.src new file mode 100644 index 0000000..307da76 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/snot.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short NOT. +; Input: +; Operand1: +; hl : 16 bit +; +; Output: +; Result: hl : 16 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __snot + .assume adl=1 + +__snot equ 000230h diff --git a/frontends/calculator/CEdev/lib/shared/sor.src b/frontends/calculator/CEdev/lib/shared/sor.src new file mode 100644 index 0000000..119a003 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sor.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short OR. +; Input: +; Operand1: +; hl : 16 bit +; +; Operand2: +; bc : 16 bit +; +; Output: +; Result: hl : 16 bit +; hl OR bc +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __sor + .assume adl=1 + +__sor equ 000234h diff --git a/frontends/calculator/CEdev/lib/shared/sprintf.src b/frontends/calculator/CEdev/lib/shared/sprintf.src new file mode 100644 index 0000000..7c09553 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sprintf.src @@ -0,0 +1,7 @@ + .def _sprintf + .assume adl=1 + +; int sprintf (char * str, const char * format, ...); + +_sprintf equ 0000BCh + diff --git a/frontends/calculator/CEdev/lib/shared/sqrtf.src b/frontends/calculator/CEdev/lib/shared/sqrtf.src new file mode 100644 index 0000000..563d151 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sqrtf.src @@ -0,0 +1,37 @@ +;-------------------------------------------------------------- +; +; IEEE Single precision square root +; Copyright 2003-2008 Zilog, Inc. +; +;-------------------------------------------------------------- +; +; INPUTS: +; Operand1: +; (stack) : 32 bit IEEE format +; +; OUTPUTS: +; Result: +; EuHL : 32 bit IEEE format result +; +; ALGORITHM: +; This algorithm is very similar to that used for binary +; division; readers should be familiar with that +; algorithm of repetitive compare/subtract, and shift. +; This algorithm uses the same concepts, except that the +; number compared/subtracted is 2*x+1, where 'x' is the +; developing result. Briefly, if 'y' is the input parameter, +; and 'x' is the result developed (and subtracted out) so +; far, then 'y - x^2' is the residual value. If the residual +; is greater than '2*x + 1', then we subtract that out, +; and add one to x; this means that the new residual is +; 'y - (x+1)^2'. Repetitively applied with shifting, 'x^2' +; approaches the value of 'y'. +; +; Registers Used: +; AF,BC,D +; +;-------------------------------------------------------------- + .def _sqrtf + .assume adl=1 + +_sqrtf equ 000298h diff --git a/frontends/calculator/CEdev/lib/shared/srand.src b/frontends/calculator/CEdev/lib/shared/srand.src new file mode 100644 index 0000000..bbcf8f2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/srand.src @@ -0,0 +1,12 @@ + .ref __setstate + .def _srand + .assume adl=1 + +; void srand(unsigned int seed); + +_srand: + pop bc + ex (sp),hl + push bc + xor a,a + jp __setstate diff --git a/frontends/calculator/CEdev/lib/shared/srandom.src b/frontends/calculator/CEdev/lib/shared/srandom.src new file mode 100644 index 0000000..0aa5189 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/srandom.src @@ -0,0 +1,29 @@ +; --- +; void srandom(uint32_t seed) +; --- + + .ref __state + .def _srandom + .def __setstate + .assume adl=1 + +_MemClear equ 00210E0h + +_srandom: + pop bc + pop de + ex (sp),hl ; lude = seed + push de + push bc + ex de,hl + ld a,e ; auhl = seed +__setstate: + ld (__state),hl + ld hl,__state+3 + ld (hl),a + ld b,12 +__setstateloop: + inc hl + ld (hl),b + djnz __setstateloop + ret diff --git a/frontends/calculator/CEdev/lib/shared/srems.src b/frontends/calculator/CEdev/lib/shared/srems.src new file mode 100644 index 0000000..54b2907 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/srems.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Modulus Signed +; Input: +; Operand1: +; hl : 16 bits +; +; Operand2: +; bc : 16 bits +; +; Output: +; Result: hl : 16 bits +; +; Registers Used: +; +;------------------------------------------------------------------------- + .ref __irems + .def __srems + .assume adl=1 + +__srems equ 000238h diff --git a/frontends/calculator/CEdev/lib/shared/sremu.src b/frontends/calculator/CEdev/lib/shared/sremu.src new file mode 100644 index 0000000..6ecd4aa --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sremu.src @@ -0,0 +1,21 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Modulus Unsigned +; Input: +; Operand1: +; hl : 16 bits +; +; Operand2: +; bc : 16 bits +; +; Output: +; Result: hl : 16 bits +; +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __sremu + .ref __iremu + .assume adl=1 + +__sremu equ 00023Ch diff --git a/frontends/calculator/CEdev/lib/shared/sshl.src b/frontends/calculator/CEdev/lib/shared/sshl.src new file mode 100644 index 0000000..cf5034d --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sshl.src @@ -0,0 +1,22 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Shift Left +; Input: +; Operand1: +; BC : 16 bit number of bits to shift +; Assume B=0 C=shift count +; Operand2: +; HL : 16 bit value to be shifted by C +; +; Output: +; Result: HL : 16 bit +; Registers Used: +; none +; Comments: +; Created 12/2001: G.Loegel +;------------------------------------------------------------------------- + .def __sshl, __sshl_b + .assume adl=1 + +__sshl_b equ 000244h +__sshl equ 000240h diff --git a/frontends/calculator/CEdev/lib/shared/sshrs.src b/frontends/calculator/CEdev/lib/shared/sshrs.src new file mode 100644 index 0000000..a997ae1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sshrs.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Shift Right Signed +; Input: +; Operand1: +; BC : 16 bit number of bits to shift +; Assume B=0 C=shift count +; Operand2: +; HL : 16 bit value to be shifted by C +; +; Output: +; Result: HL : 16 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __sshrs, __sshrs_b + .assume adl=1 + +__sshrs_b equ 00024Ch +__sshrs equ 000248h diff --git a/frontends/calculator/CEdev/lib/shared/sshru.src b/frontends/calculator/CEdev/lib/shared/sshru.src new file mode 100644 index 0000000..796f776 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sshru.src @@ -0,0 +1,20 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Short Shift Right Unsigned +; Input: +; Operand1: +; BC : 16 bit number of bits to shift +; Assume B=0 C=shift count +; Operand2: +; HL : 16 bit value to be shifted by C +; +; Output: +; Result: HL : 16 bit +; Registers Used: +; none +;------------------------------------------------------------------------- + .def __sshru, __sshru_b + .assume adl=1 + +__sshru_b equ 000254h +__sshru equ 000250h diff --git a/frontends/calculator/CEdev/lib/shared/sstix.src b/frontends/calculator/CEdev/lib/shared/sstix.src new file mode 100644 index 0000000..6f0a11b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sstix.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Integer store (ix+nnnnnn),HL +; Input: +; Operand1: +; BC : 24-bit offset from ix +; HL : 16-bit integer to store +; +; Output: +; +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __sstix + .assume adl=1 + +__sstix equ 000258h + diff --git a/frontends/calculator/CEdev/lib/shared/sstiy.src b/frontends/calculator/CEdev/lib/shared/sstiy.src new file mode 100644 index 0000000..504133c --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sstiy.src @@ -0,0 +1,19 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; short store (iy+nnnnnn),HL +; Input: +; Operand1: +; BC : 24-bit offset from iy +; HL : 16-bit integer to store +; +; Output: +; +; +; Registers Used: +; +;------------------------------------------------------------------------- + .def __sstiy + .assume adl=1 + +__sstiy equ 00025Ch + diff --git a/frontends/calculator/CEdev/lib/shared/stoi.src b/frontends/calculator/CEdev/lib/shared/stoi.src new file mode 100644 index 0000000..9ad6430 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/stoi.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Signed Short to Integer Conversion +; Input: +; Operand1: +; BC : 16 bit number to convert +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __stoi + .assume adl=1 + +__stoi equ 000260h diff --git a/frontends/calculator/CEdev/lib/shared/stoiu.src b/frontends/calculator/CEdev/lib/shared/stoiu.src new file mode 100644 index 0000000..db0d59e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/stoiu.src @@ -0,0 +1,16 @@ +; (c) Copyright 2001-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Short to Integer Conversion +; Input: +; Operand1: +; BC : 16 bit number to convert +; +; Output: +; Result: HL : 24 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __stoiu + .assume adl=1 + +__stoiu equ 000264h diff --git a/frontends/calculator/CEdev/lib/shared/strcasecmp.src b/frontends/calculator/CEdev/lib/shared/strcasecmp.src new file mode 100644 index 0000000..2808f5b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strcasecmp.src @@ -0,0 +1,6 @@ + .def _strcasecmp + .assume adl=1 + +; int strcasecmp(const char *f1, const char *f2); + +_strcasecmp equ 021E3Ch
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/strcat.src b/frontends/calculator/CEdev/lib/shared/strcat.src new file mode 100644 index 0000000..297e5da --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strcat.src @@ -0,0 +1,6 @@ + .def _strcat + .assume adl=1 + +; char *strcat(char *s1, char *s2); + +_strcat equ 0000C0h diff --git a/frontends/calculator/CEdev/lib/shared/strchr.src b/frontends/calculator/CEdev/lib/shared/strchr.src new file mode 100644 index 0000000..103602b --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strchr.src @@ -0,0 +1,6 @@ + .def _strchr + .assume adl=1 + +; char *strchr(char *s, int c); + +_strchr equ 0000C4h diff --git a/frontends/calculator/CEdev/lib/shared/strcmp.src b/frontends/calculator/CEdev/lib/shared/strcmp.src new file mode 100644 index 0000000..9eb4f6e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strcmp.src @@ -0,0 +1,6 @@ + .def _strcmp + .assume adl=1 + +; int strcmp(register char *s1, register char *s2) + +_strcmp equ 0000C8h diff --git a/frontends/calculator/CEdev/lib/shared/strcpy.src b/frontends/calculator/CEdev/lib/shared/strcpy.src new file mode 100644 index 0000000..38c0eb0 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strcpy.src @@ -0,0 +1,6 @@ + .def _strcpy + .assume adl=1 + +; char *strcpy(void *d, void *s); + +_strcpy equ 0000CCh diff --git a/frontends/calculator/CEdev/lib/shared/strcspn.src b/frontends/calculator/CEdev/lib/shared/strcspn.src new file mode 100644 index 0000000..1d83171 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strcspn.src @@ -0,0 +1,6 @@ + .def _strcspn + .assume adl=1 + +; size_t strcspn(char *s1, char *s2); + +_strcspn equ 0000D0h diff --git a/frontends/calculator/CEdev/lib/shared/strdup.src b/frontends/calculator/CEdev/lib/shared/strdup.src new file mode 100644 index 0000000..2debaa3 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strdup.src @@ -0,0 +1,35 @@ + .ref __frameset + .ref _malloc + .ref _strlen + .ref _strcpy + .def _strdup + .assume adl=1 + +_strdup: + ld hl,-3 + call __frameset + ld bc,(ix+6) + push bc + call _strlen + pop bc + inc hl + push hl + call _malloc + pop bc + ld (ix+-3),hl + add hl,de + or a,a + sbc hl,de + jr z,MallocFail + ld bc,(ix+6) + push bc + ld bc,(ix+-3) + push bc + call _strcpy + pop bc + pop bc +MallocFail: + ld hl,(ix+-3) + ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/strlen.src b/frontends/calculator/CEdev/lib/shared/strlen.src new file mode 100644 index 0000000..5ef9fad --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strlen.src @@ -0,0 +1,6 @@ + .def _strlen + .assume adl=1 + +; size_t strlen(char *s); + +_strlen equ 0000D4h diff --git a/frontends/calculator/CEdev/lib/shared/strncasecmp.src b/frontends/calculator/CEdev/lib/shared/strncasecmp.src new file mode 100644 index 0000000..fdc603e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strncasecmp.src @@ -0,0 +1,6 @@ + .def _strncasecmp + .assume adl=1 + +; int strncasecmp ( const char *str1 , const char *str2 , int len ); + +_strncasecmp equ 021E3Ch diff --git a/frontends/calculator/CEdev/lib/shared/strncat.src b/frontends/calculator/CEdev/lib/shared/strncat.src new file mode 100644 index 0000000..5f6a532 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strncat.src @@ -0,0 +1,6 @@ + .def _strncat + .assume adl=1 + +; char *strncat(char *s1, char *s2, size_t n) + +_strncat equ 0000D8h diff --git a/frontends/calculator/CEdev/lib/shared/strncmp.src b/frontends/calculator/CEdev/lib/shared/strncmp.src new file mode 100644 index 0000000..08f2750 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strncmp.src @@ -0,0 +1,6 @@ + .def _strncmp + .assume adl=1 + +; int strncmp(char *s1, char *s2, size_t n) + +_strncmp equ 0000DCh diff --git a/frontends/calculator/CEdev/lib/shared/strncpy.src b/frontends/calculator/CEdev/lib/shared/strncpy.src new file mode 100644 index 0000000..b46a72e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strncpy.src @@ -0,0 +1,6 @@ + .def _strncpy + .assume adl=1 + +; char *strncpy(char *dst, char *src, size_t n) + +_strncpy equ 0000E0h diff --git a/frontends/calculator/CEdev/lib/shared/strndup.src b/frontends/calculator/CEdev/lib/shared/strndup.src new file mode 100644 index 0000000..26c656c --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strndup.src @@ -0,0 +1,46 @@ + .def _strndup + .ref __frameset + .ref _strlen + .ref _malloc + .ref _memcpy + .assume adl=1 + +_strndup: + ld hl,-6 + call __frameset + ld bc,(ix+6) + push bc + call _strlen + ld (ix+-3),hl + ex de,hl + ld hl,(ix+9) + or a,a + sbc hl,de + jr nc,Greater + ld hl,(ix+9) + ld (ix+-3),hl +Greater: + ld bc,(ix+-3) + inc bc + push bc + call _malloc + ld (ix+-6),hl + add hl,bc + or a,a + sbc hl,bc + jr z,MallocFail + ld bc,(ix+-3) + ld hl,(ix+-6) + add hl,bc + ld (hl),0 + or a,a + sbc hl,bc + push bc + ld bc,(ix+6) + push bc + push hl + call _memcpy +MallocFail: + ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/strnlen.src b/frontends/calculator/CEdev/lib/shared/strnlen.src new file mode 100644 index 0000000..823ea49 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strnlen.src @@ -0,0 +1,27 @@ + .def _strnlen + .ref __frameset0 + .assume adl=1 + +_strnlen: + call __frameset0 + ld de,(ix+6) + ld bc,(ix+9) + or a,a + sbc hl,hl + jr StartFor +ForLoop: + inc hl + inc de +StartFor: + push hl + or a,a + sbc hl,bc + pop hl + jr nc,ReachedMax + ld a,(de) + or a,a + jr nz,ForLoop +ReachedMax: + ld sp,ix + pop ix + ret diff --git a/frontends/calculator/CEdev/lib/shared/strpbrk.src b/frontends/calculator/CEdev/lib/shared/strpbrk.src new file mode 100644 index 0000000..f9ff01f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strpbrk.src @@ -0,0 +1,6 @@ + .def _strpbrk + .assume adl=1 + +; char *strpbrk(char *s1, char *s2) + +_strpbrk equ 0000E4h diff --git a/frontends/calculator/CEdev/lib/shared/strrchr.src b/frontends/calculator/CEdev/lib/shared/strrchr.src new file mode 100644 index 0000000..80fab4a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strrchr.src @@ -0,0 +1,6 @@ + .def _strrchr + .assume adl=1 + +; char *strrchr(char *s, int c) + +_strrchr equ 0000E8h diff --git a/frontends/calculator/CEdev/lib/shared/strspn.src b/frontends/calculator/CEdev/lib/shared/strspn.src new file mode 100644 index 0000000..bb5ad3e --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strspn.src @@ -0,0 +1,5 @@ + .def _strspn + .assume adl=1 + +; size_t strspn(char *s1,char *s2) +_strspn equ 0000ECh diff --git a/frontends/calculator/CEdev/lib/shared/strstr.src b/frontends/calculator/CEdev/lib/shared/strstr.src new file mode 100644 index 0000000..585c5c0 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strstr.src @@ -0,0 +1,6 @@ + .def _strstr + .assume adl=1 + +; char *strstr(char *s1, char *s2); + +_strstr equ 0000F0h diff --git a/frontends/calculator/CEdev/lib/shared/strtok.src b/frontends/calculator/CEdev/lib/shared/strtok.src new file mode 100644 index 0000000..14f3ef6 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strtok.src @@ -0,0 +1,5 @@ + .def _strtok + .assume adl=1 + +_strtok equ 0000F4h +
\ No newline at end of file diff --git a/frontends/calculator/CEdev/lib/shared/strtol.src b/frontends/calculator/CEdev/lib/shared/strtol.src new file mode 100644 index 0000000..fff8564 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strtol.src @@ -0,0 +1,370 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\STRTOL.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2008 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /************************************************************************/
+; 9 #include <stdio.h>
+; 10 #include <stdlib.h>
+; 11 #include <limits.h>
+; 12 #include <stddef.h>
+; 13 #include <ctype.h>
+; 14 #include <errno.h>
+; 15
+; 16 /*************************************************
+; 17 *
+; 18 * strtol - string to long conversion
+; 19 *
+; 20 * Inputs:
+; 21 * cp - pointer to the character string
+; 22 * endptr - place to put ptr to first invalid character
+; 23 * base - radix
+; 24 *
+; 25 * Returns:
+; 26 * the value of the number
+; 27 *
+; 28 *************************************************/
+; 29 long strtol(char *cp,char **endptr,int base)
+; 30 {
+_strtol:
+ LD HL,-30
+ CALL __frameset
+; 31 register long sum,psum;
+; 32 register char sign;
+; 33 register int radix = base;
+ LD BC,(IX+12)
+ LD (IX+-8),BC
+; 34 char digit;
+; 35
+; 36 while (isspace(*cp))
+ JR L_0
+L_1:
+; 37 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_0:
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_1
+; 38
+; 39 sign = 0;
+ LD (IX+-9),0
+; 40 if ( *cp == (char)'-' ) {
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,45
+ JR NZ,L_5
+; 41 sign = 1;
+ LD (IX+-9),1
+; 42 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 43 }
+; 44 else if ( *cp == (char)'+' )
+ JR L_11
+L_5:
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,43
+ JR NZ,L_11
+; 45 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_11:
+; 46
+; 47 if (base == 0) {
+ LD HL,(IX+12)
+ CALL __icmpzero
+ JR NZ,L_16
+; 48 radix = 10;
+ LD BC,10
+ LD (IX+-8),BC
+; 49 if (*cp == (char)'0')
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,48
+ JR NZ,L_16
+; 50 if (cp[1] == (char)'x' || cp[1] == (char)'X')
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+-12),BC
+ LD HL,BC
+ LD A,(HL)
+ CP A,120
+ JR Z,L_7
+ LD HL,(IX+-12)
+ LD A,(HL)
+ CP A,88
+ JR NZ,L_8
+L_7:
+; 51 radix = 16;
+ LD BC,16
+ LD (IX+-8),BC
+; 52 else
+ JR L_16
+L_8:
+; 53 radix = 8;
+ LD BC,8
+ LD (IX+-8),BC
+; 54 }
+L_16:
+; 55
+; 56 if (base == 16 && *cp == (char)'0' && (cp[1] == (char)'x' || cp[1] == (char)'X'))
+ LD BC,16
+ LD HL,(IX+12)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_17
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,48
+ JR NZ,L_17
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+-15),BC
+ LD HL,BC
+ LD A,(HL)
+ CP A,120
+ JR Z,L_15
+ LD HL,(IX+-15)
+ LD A,(HL)
+ CP A,88
+ JR NZ,L_17
+L_15:
+; 57 cp += 2;
+ LD IY,(IX+6)
+ LEA IY,IY+2
+ LD (IX+6),IY
+L_17:
+; 58
+; 59 sum = 0;
+ LD BC,0
+ LD (IX+-5),BC
+ XOR A,A
+ LD (IX+-2),A
+; 60 for (;;) {
+L_30:
+; 61 digit = toupper(*(cp++));
+ LD BC,(IX+6)
+ LD (IX+-30),BC
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+ LD HL,(IX+-30)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _toupper
+ POP BC
+ LD (IX+-1),L
+; 62 if (digit >= (char)'A')
+ LD A,(IX+-1)
+ CP A,65
+ CALL __setflag
+ JP M,L_20
+; 63 digit = (digit - (char)'A') + (char)10;
+ LD A,(IX+-1)
+ ADD A,-55
+ LD (IX+-1),A
+; 64 else
+ JR L_23
+L_20:
+; 65 digit -= (char)'0';
+ LD A,(IX+-1)
+ ADD A,-48
+ LD (IX+-1),A
+L_23:
+; 66 if (digit < (char)0 || digit >= (char)radix)
+ LD A,(IX+-1)
+ OR A,A
+ JP M,L_40
+ LD B,(IX+-8)
+ LD A,(IX+-1)
+ CP A,B
+ CALL __setflag
+ JP P,L_40
+; 67 break;
+; 68 psum = sum;
+ LD BC,(IX+-5)
+ LD A,(IX+-2)
+ LD (IX+-27),BC
+ LD (IX+-24),A
+; 69 sum *= radix;
+ LD BC,(IX+-8)
+ CALL __itol
+ LD HL,(IX+-5)
+ LD E,(IX+-2)
+ CALL __lmuls
+ LD (IX+-5),HL
+ LD (IX+-2),E
+; 70 sum += digit;
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+-5)
+ LD E,(IX+-2)
+ CALL __ladd
+ LD (IX+-5),HL
+ LD (IX+-2),E
+; 71 if (sum < psum) { /* overflow */
+ LD HL,(IX+-5)
+ LD E,(IX+-2)
+ LD BC,(IX+-27)
+ LD A,(IX+-24)
+ CALL __lcmps
+ CALL __setflag
+ JP P,L_30
+; 72 sum = sign ? LONG_MIN : LONG_MAX;
+ LD A,(IX+-9)
+ OR A,A
+ JR Z,L_27
+ LD BC,0
+ LD (IX+-19),BC
+ LD A,128
+ LD (IX+-16),A
+ JR L_28
+L_27:
+ LD BC,16777215
+ LD (IX+-19),BC
+ LD A,127
+ LD (IX+-16),A
+L_28:
+ LD BC,(IX+-19)
+ LD A,(IX+-16)
+ LD (IX+-5),BC
+ LD (IX+-2),A
+; 73 errno=ERANGE;
+ LD BC,5
+ LD (_errno),BC
+; 74 break;
+; 75 }
+; 76 }
+L_40:
+; 77
+; 78 if (endptr) {
+ LD HL,(IX+9)
+ CALL __icmpzero
+ JR Z,L_45
+; 79 --cp;
+ LD IY,(IX+6)
+ LEA IY,IY+-1
+ LD (IX+6),IY
+; 80 if (base == 0) {
+ LD HL,(IX+12)
+ CALL __icmpzero
+ JR Z,L_35
+ JR L_38
+; 81 while (*cp == (char)'h' || *cp == (char)'u' ||
+L_36:
+; 82 *cp == (char)'l' || *cp == (char)'L')
+; 83 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_35:
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,104
+ JR Z,L_36
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,117
+ JR Z,L_36
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,108
+ JR Z,L_36
+ LD HL,(IX+6)
+ LD A,(HL)
+ CP A,76
+ JR Z,L_36
+; 84 }
+L_38:
+; 85 *endptr = cp;
+ LD HL,(IX+9)
+ LD BC,(IX+6)
+ LD (HL),BC
+; 86 }
+L_45:
+; 87 return(sign ? -sum : sum);
+ LD A,(IX+-9)
+ OR A,A
+ JR Z,L_43
+ LD HL,(IX+-5)
+ LD E,(IX+-2)
+ CALL __lneg
+ LD (IX+-23),HL
+ LD (IX+-20),E
+ JR L_44
+L_43:
+ LD BC,(IX+-5)
+ LD A,(IX+-2)
+ LD (IX+-23),BC
+ LD (IX+-20),A
+L_44:
+ LD HL,(IX+-23)
+ LD E,(IX+-20)
+; 88 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _strtol ***************************
+;Name Addr/Register Size Type
+;_errno IMPORT 3 variable
+;_toupper IMPORT ----- function
+;_isspace IMPORT ----- function
+;psum IX-27 4 variable
+;temp41 IX-23 4 variable
+;temp25 IX-19 4 variable
+;G_1 IX-15 3 variable
+;G_0 IX-12 3 variable
+;sign IX-9 1 variable
+;radix IX-8 3 variable
+;sum IX-5 4 variable
+;digit IX-1 1 variable
+;base IX+12 3 parameter
+;endptr IX+9 3 parameter
+;cp IX+6 3 parameter
+
+
+; Stack Frame Size: 45 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _errno:ROM
+ XREF _toupper:ROM
+ XREF _isspace:ROM
+ XREF __lcmps:ROM
+ XREF __ladd:ROM
+ XREF __lmuls:ROM
+ XREF __lneg:ROM
+ XREF __itol:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XREF __icmpzero:ROM
+ XDEF _strtol
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/strtoul.src b/frontends/calculator/CEdev/lib/shared/strtoul.src new file mode 100644 index 0000000..557d691 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/strtoul.src @@ -0,0 +1,403 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\STRTOUL.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 2006-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stdio.h>
+; 7 #include <stdlib.h>
+; 8 #include <limits.h>
+; 9 #include <stddef.h>
+; 10 #include <ctype.h>
+; 11 #include <errno.h>
+; 12
+; 13 /*************************************************
+; 14 *
+; 15 * strtoul - string to unsigned long conversion
+; 16 *
+; 17 * Inputs:
+; 18 * cp - pointer to the character string
+; 19 * endptr - place to put ptr to first invalid character
+; 20 * base - radix
+; 21 *
+; 22 * Returns:
+; 23 * the value of the number
+; 24 *
+; 25 *************************************************/
+; 26 unsigned long strtoul(char * cp,char ** endptr,int base)
+; 27 {
+_strtoul:
+ LD HL,-23
+ CALL __frameset
+; 28 register unsigned long sum,psum;
+; 29 register unsigned char sign;
+; 30 register unsigned char radix = base;
+ LD A,(IX+12)
+ LD (IX+-2),A
+; 31 register unsigned char digit;
+; 32
+; 33 while (isspace(*cp))
+ JR L_0
+L_1:
+; 34 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_0:
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_1
+; 35
+; 36 sign = 0;
+ LD (IX+-7),0
+; 37
+; 38 if ( *cp == '+' ) {
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,43
+ SBC HL,BC
+ JR NZ,L_5
+; 39 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 40 }
+; 41 else if ( *cp == '-' ) {
+ JR L_12
+L_5:
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,45
+ SBC HL,BC
+ JR NZ,L_12
+; 42 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 43 sign = 1;
+ LD (IX+-7),1
+; 44 }
+L_12:
+; 45
+; 46 if (base == 0) {
+ LD HL,(IX+12)
+ CALL __icmpzero
+ JR NZ,L_17
+; 47 if (*cp == '0')
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,48
+ SBC HL,BC
+ JR NZ,L_10
+; 48 if (cp[1] == 'x' || cp[1] == 'X')
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+-10),BC
+ LD HL,BC
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,120
+ SBC HL,BC
+ JR Z,L_7
+ LD HL,(IX+-10)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,88
+ SBC HL,BC
+ JR NZ,L_8
+L_7:
+; 49 radix = 16;
+ LD (IX+-2),16
+; 50 else
+ JR L_17
+L_8:
+; 51 radix = 8;
+ LD (IX+-2),8
+; 52 else
+ JR L_17
+L_10:
+; 53 radix = 10;
+ LD (IX+-2),10
+; 54 }
+L_17:
+; 55
+; 56 /* If the base is declared as 16, the "0x" prefix may be ignored. */
+; 57 if (base == 16 && *cp == '0' && (cp[1] == 'x' || cp[1] == 'X'))
+ LD BC,16
+ LD HL,(IX+12)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_18
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,48
+ SBC HL,BC
+ JR NZ,L_18
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+-13),BC
+ LD HL,BC
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,120
+ SBC HL,BC
+ JR Z,L_16
+ LD HL,(IX+-13)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,88
+ SBC HL,BC
+ JR NZ,L_18
+L_16:
+; 58 cp += 2;
+ LD IY,(IX+6)
+ LEA IY,IY+2
+ LD (IX+6),IY
+L_18:
+; 59
+; 60 sum = 0;
+ LD BC,0
+ LD (IX+-6),BC
+ XOR A,A
+ LD (IX+-3),A
+; 61 for (;;) {
+L_26:
+; 62 digit = toupper(*(cp++));
+ LD BC,(IX+6)
+ LD (IX+-20),BC
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+ LD HL,(IX+-20)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _toupper
+ POP BC
+ LD (IX+-1),L
+; 63 if (digit >= 'A')
+ LD A,(IX+-1)
+ CP A,65
+ JR C,L_21
+; 64 digit = digit - ('A' - 10);
+ LD A,(IX+-1)
+ SUB A,55
+ LD (IX+-1),A
+; 65 else
+ JR L_23
+L_21:
+; 66 digit -= '0';
+ LD A,(IX+-1)
+ SUB A,48
+ LD (IX+-1),A
+L_23:
+; 67 if (digit >= radix)
+ LD A,(IX+-1)
+ CP A,(IX+-2)
+ JR NC,L_29
+; 68 break;
+; 69 psum = sum;
+ LD BC,(IX+-6)
+ LD D,(IX+-3)
+ LD (IX+-17),BC
+ LD (IX+-14),D
+; 70 sum = sum * radix + digit;
+ UEXT HL
+ LD L,(IX+-2)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+-6)
+ LD E,(IX+-3)
+ CALL __lmulu
+ LD (IX+-23),HL
+ UEXT HL
+ LD L,(IX+-1)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+-23)
+ CALL __ladd
+ LD (IX+-6),HL
+ LD (IX+-3),E
+; 71 if (sum < psum) { /* overflow */
+ LD HL,(IX+-6)
+ LD E,(IX+-3)
+ LD BC,(IX+-17)
+ LD A,(IX+-14)
+ CALL __lcmpu
+ JR NC,L_26
+; 72 errno = ERANGE;
+ LD BC,5
+ LD (_errno),BC
+; 73 sum = ULONG_MAX;
+ LD BC,16777215
+ LD (IX+-6),BC
+ LD A,255
+ LD (IX+-3),A
+; 74 }
+; 75 }
+ JR L_26
+L_29:
+; 76
+; 77 if (sign) {
+ LD A,(IX+-7)
+ OR A,A
+ JR Z,L_38
+; 78 // errno = ERANGE;
+; 79 // sum = 0;
+; 80 sum = -sum;
+ LD HL,(IX+-6)
+ LD E,(IX+-3)
+ CALL __lneg
+ LD (IX+-6),HL
+ LD (IX+-3),E
+; 81 }
+L_38:
+; 82
+; 83 if (endptr) {
+ LD HL,(IX+9)
+ CALL __icmpzero
+ JR Z,L_39
+; 84 --cp;
+ LD IY,(IX+6)
+ LEA IY,IY+-1
+ LD (IX+6),IY
+; 85 if (base == 0) {
+ LD HL,(IX+12)
+ CALL __icmpzero
+ JR Z,L_33
+ JR L_36
+; 86 while (*cp == 'h' || *cp == 'u' ||
+L_34:
+; 87 *cp == 'l' || *cp == 'L')
+; 88 ++cp;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_33:
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,104
+ SBC HL,BC
+ JR Z,L_34
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,117
+ SBC HL,BC
+ JR Z,L_34
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,108
+ SBC HL,BC
+ JR Z,L_34
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,76
+ SBC HL,BC
+ JR Z,L_34
+; 89 }
+L_36:
+; 90 *endptr = (char*)cp;
+ LD HL,(IX+9)
+ LD BC,(IX+6)
+ LD (HL),BC
+; 91 }
+L_39:
+; 92 return(sum);
+ LD HL,(IX+-6)
+ LD E,(IX+-3)
+; 93 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _strtoul ***************************
+;Name Addr/Register Size Type
+;_errno IMPORT 3 variable
+;_toupper IMPORT ----- function
+;_isspace IMPORT ----- function
+;psum IX-17 4 variable
+;G_1 IX-13 3 variable
+;G_0 IX-10 3 variable
+;sign IX-7 1 variable
+;sum IX-6 4 variable
+;radix IX-2 1 variable
+;digit IX-1 1 variable
+;base IX+12 3 parameter
+;endptr IX+9 3 parameter
+;cp IX+6 3 parameter
+
+
+; Stack Frame Size: 38 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _errno:ROM
+ XREF _toupper:ROM
+ XREF _isspace:ROM
+ XREF __lcmpu:ROM
+ XREF __ladd:ROM
+ XREF __lmulu:ROM
+ XREF __lneg:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XDEF _strtoul
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/sxor.src b/frontends/calculator/CEdev/lib/shared/sxor.src new file mode 100644 index 0000000..2771ff2 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/sxor.src @@ -0,0 +1,18 @@ +;------------------------------------------------------------------------- +; Short XOR. +; Input: +; Operand1: +; bc : 16 bit +; +; Operand2: +; hl : 16 bit +; +; Output: +; Result: hl : 16 bit +; Registers Used: +; a +;------------------------------------------------------------------------- + .def __sxor + .assume adl=1 + +__sxor equ 000268h diff --git a/frontends/calculator/CEdev/lib/shared/tice.src b/frontends/calculator/CEdev/lib/shared/tice.src new file mode 100644 index 0000000..5467be1 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/tice.src @@ -0,0 +1,241 @@ +; --- +; external definitions +; --- + .def _boot_GetBootMajorVer + .def _boot_GetHardwareVer + .def _boot_GetBootMinorVer + .def _boot_DebugPrintf + .def _boot_ClearVRAM + .def _boot_TurnOff + .def _boot_NewLine + .def _boot_Set6MHzMode + .def _boot_Set48MHzMode + .def _boot_Set6MHzModeI + .def _boot_Set48MHzModeI + .def _boot_GetBatteryStatus + .def _boot_WaitShort + .def _boot_CheckOnPressed + .def _boot_SetDate + .def _boot_GetDate + .def _boot_GetTime + .def _boot_SetTime + .def _boot_IsAfterNoon + + .def _os_NewLine + .def _os_PushErrorHandler + .def _os_PopErrorHandler + .def _os_ThrowError + .def _os_RealCopy + .def _os_RealAsinRad + .def _os_RealAcosRad + .def _os_RealAtanRad + .def _os_RealAdd + .def _os_CplxSquare + .def _os_RealCompare + .def _os_RealCosRad + .def _os_RealRadToDeg + .def _os_RealDiv + .def _os_RealExp + .def _os_RealFloor + .def _os_RealToStr + .def _os_RealFrac + .def _os_RealGcd + .def _os_RealRoundInt + .def _os_RealLcm + .def _os_RealLog + .def _os_RealMax + .def _os_RealMin + .def _os_RealMul + .def _os_RealNcr + .def _os_RealNeg + .def _os_RealNpr + .def _os_RealPow + .def _os_RealDegToRad + .def _os_RealRandInt + .def _os_RealInv + .def _os_RealMod + .def _os_RealRound + .def _os_RealSinRad + .def _os_RealSqrt + .def _os_RealSub + .def _os_RealTanRad + .def _os_StrToReal + .def _os_RealInt + .def _os_SetFlagBits + .def _os_ResetFlagBits + .def _os_TestFlagBits + .def _os_SetFlagByte + .def _os_GetFlagByte + .def _os_GetCursorPos + .def _os_PutStrFull + .def _os_PutStrLine + .def _os_SetCursorPos + .def _os_AppInit + .def _os_GetKey + .def _os_GetCSC + .def _os_DisableCursor + .def _os_EnableCursor + .def _os_FontDrawText + .def _os_FontGetHeight + .def _os_FontGetWidth + .def _os_InitDrawing + .def _os_SetDrawBGColor + .def _os_SetDrawFGColor + .def _os_FontSelect + .def _os_RclAns + .def _os_SetTimer1 + .def _os_DisableTimer1 + .def _os_GetSystemStats + .def _os_GetDrawBGColor + .def _os_GetDrawFGColor + .def _os_FontGetID + .def _os_RealToInt24 + .def _os_Int24ToReal + .def _os_ForceCmdNoChar + .def _os_GetSymTablePtr + .def _os_NextSymEntry + .def _os_ChkFindSym + .def _os_MemChk + .def _os_SetTimer2 + .def _os_DisableTimer2 + .def _os_FloatToReal + .def _os_RealToFloat + .def _os_FontDrawTransText + .def _os_CreateAppVar + + .def _asm_MoveDown + .def _asm_MoveUp + .def _asm_ClrLCDFull + .def _asm_ClrLCD + .def _asm_ClrTxtShd + .def _asm_HomeUp + .def _asm_RunIndicOn + .def _asm_RunIndicOff + .def _asm_DelRes + .def _asm_DisableAPD + .def _asm_EnableAPD + .def _asm_DrawStatusBar + .def _asm_ArcChk + .assume adl=1 + +; --- +; locations +; --- +_boot_GetBootMajorVer equ 000080h +_boot_GetHardwareVer equ 000084h +_boot_GetBootMinorVer equ 00008Ch +_boot_DebugPrintf equ 0000B4h +_boot_ClearVRAM equ 000374h +_boot_TurnOff equ 000388h +_boot_NewLine equ 000390h +_boot_Set6MHzMode equ 00039Ch +_boot_Set48MHzMode equ 0003A0h +_boot_Set6MHzModeI equ 0003A4h +_boot_Set48MHzModeI equ 0003A8h +_boot_GetBatteryStatus equ 0003B0h +_boot_WaitShort equ 0003B4h +_boot_CheckOnPressed equ 00057Ch +_boot_SetDate equ 000598h +_boot_GetDate equ 0005A8h +_boot_GetTime equ 0005B0h +_boot_SetTime equ 0005B4h +_boot_IsAfterNoon equ 0005C8h + +_os_NewLine equ 0207F0h +_os_PushErrorHandler equ 021C78h +_os_PopErrorHandler equ 021C7Ch +_os_ThrowError equ 021C80h +_os_RealCopy equ 021C84h +_os_RealAsinRad equ 021C88h +_os_RealAcosRad equ 021C8Ch +_os_RealAtanRad equ 021C90h +_os_RealAdd equ 021C94h +_os_CplxSquare equ 021C98h +_os_RealCompare equ 021C9Ch +_os_RealCosRad equ 021CA0h +_os_RealRadToDeg equ 021CA4h +_os_RealDiv equ 021CA8h +_os_RealExp equ 021CACh +_os_RealFloor equ 021CB0h +_os_RealToStr equ 021CB4h +_os_RealFrac equ 021CB8h +_os_RealGcd equ 021CBCh +_os_RealRoundInt equ 021CC0h +_os_RealLcm equ 021CC4h +_os_RealLog equ 021CC8h +_os_RealMax equ 021CCCh +_os_RealMin equ 021CD0h +_os_RealMul equ 021CD4h +_os_RealNcr equ 021CD8h +_os_RealNeg equ 021CDCh +_os_RealNpr equ 021CE0h +_os_RealPow equ 021CE4h +_os_RealDegToRad equ 021CE8h +_os_RealRandInt equ 021CECh +_os_RealInv equ 021CF0h +_os_RealMod equ 021CF4h +_os_RealRound equ 021CF8h +_os_RealSinRad equ 021CFCh +_os_RealSqrt equ 021D00h +_os_RealSub equ 021D04h +_os_RealTanRad equ 021D08h +_os_StrToReal equ 021D0Ch +_os_RealInt equ 021D10h +_os_SetFlagBits equ 021D14h +_os_ResetFlagBits equ 021D18h +_os_TestFlagBits equ 021D1Ch +_os_SetFlagByte equ 021D20h +_os_GetFlagByte equ 021D24h +_os_GetCursorPos equ 021D28h +_os_PutStrFull equ 021D2Ch +_os_PutStrLine equ 021D30h +_os_SetCursorPos equ 021D34h +_os_AppInit equ 021D40h +_os_GetKey equ 021D38h +_os_GetCSC equ 021D3Ch +_os_DisableCursor equ 021DE4h +_os_EnableCursor equ 021DE8h +_os_FontDrawText equ 021E00h +_os_FontGetHeight equ 021E14h +_os_FontGetWidth equ 021E18h +_os_InitDrawing equ 021E1Ch +_os_SetDrawBGColor equ 021E20h +_os_SetDrawFGColor equ 021E24h +_os_FontSelect equ 021E28h +_os_RclAns equ 021E70h +_os_SetTimer1 equ 021EC8h +_os_DisableTimer1 equ 021ECCh +_os_GetSystemStats equ 021ED4h +_os_GetDrawBGColor equ 021EE4h +_os_GetDrawFGColor equ 021EE8h +_os_FontGetID equ 021EECh +_os_RealToInt24 equ 021EF4h +_os_Int24ToReal equ 021EF8h +_os_ForceCmdNoChar equ 021FA8h +_os_GetSymTablePtr equ 021FB0h +_os_NextSymEntry equ 021FB4h +_os_ChkFindSym equ 021FB8h +_os_MemChk equ 021FF0h +_os_SetTimer2 equ 022080h +_os_DisableTimer2 equ 022084h +_os_FloatToReal equ 022170h +_os_RealToFloat equ 022174h +_os_FontDrawTransText equ 022178h +_os_CreateAppVar equ 022184h + +; --- +; directly callable asm functions +; --- +_asm_MoveDown equ 0207F4h +_asm_MoveUp equ 020800h +_asm_ClrLCDFull equ 020808h +_asm_ClrLCD equ 02080Ch +_asm_ClrTxtShd equ 020818h +_asm_HomeUp equ 020828h +_asm_RunIndicOn equ 020844h +_asm_RunIndicOff equ 020848h +_asm_DelRes equ 020E5Ch +_asm_DisableAPD equ 021134h +_asm_EnableAPD equ 021138h +_asm_DrawStatusBar equ 021A3Ch +_asm_ArcChk equ 022040h diff --git a/frontends/calculator/CEdev/lib/shared/tolower.src b/frontends/calculator/CEdev/lib/shared/tolower.src new file mode 100644 index 0000000..db6c58d --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/tolower.src @@ -0,0 +1,4 @@ + .assume adl=1 + .def _tolower + +_tolower equ 021E34h diff --git a/frontends/calculator/CEdev/lib/shared/toupper.src b/frontends/calculator/CEdev/lib/shared/toupper.src new file mode 100644 index 0000000..eb5dcea --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/toupper.src @@ -0,0 +1,4 @@ + .assume adl=1 + .def _toupper + +_toupper equ 021E38h diff --git a/frontends/calculator/CEdev/lib/shared/udtoe.src b/frontends/calculator/CEdev/lib/shared/udtoe.src new file mode 100644 index 0000000..c19cf68 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/udtoe.src @@ -0,0 +1,411 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UDTOE.C"
+ .assume ADL=1
+ SEGMENT BSS
+__info:
+ DS 12
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8 #include <ctype.h>
+; 9 //#include <sio.h>
+; 10 #include <float.h>
+; 11
+; 12
+; 13 struct flt_info _info;
+ SEGMENT CODE
+; 14 typedef long reg_t;
+; 15 typedef unsigned long ureg_t;
+; 16
+; 17 /*************************************************
+; 18 *
+; 19 * _u_dtoe - convert a double float to ASCII in e format
+; 20 *
+; 21 * Inputs:
+; 22 * n - value to be converted
+; 23 * s - target char array
+; 24 * __print_fmt - format structure with conversion info
+; 25 *
+; 26 * Locals:
+; 27 * ndig - The number of significant digits in the output. This is
+; 28 * assumed to be less than 128!
+; 29 *
+; 30 * Returns:
+; 31 * next address past the end of the string
+; 32 *
+; 33 *************************************************/
+; 34 char * _u_dtoe(double n)
+; 35 {
+__u_dtoe:
+ LD HL,-36
+ CALL __frameset
+; 36 register ureg_t i;
+; 37 register ureg_t ndig;
+; 38 register reg_t exp;
+; 39 char * s = __print_buff;
+ LD BC,___print_buff
+ LD (IX+-3),BC
+; 40
+; 41 /* One digit to the left of the decimal point, and precision after. */
+; 42 ndig = __print_fmt.precision + 1;
+ LD A,(___print_fmt+6)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD E,H
+ LD A,1
+ CALL __ladd_b
+ LD (IX+-15),HL
+ LD (IX+-12),E
+; 43 _u_flt_info(n,&_info);
+ LD BC,__info
+ PUSH BC
+ LD C,(IX+9)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __u_flt_info
+ POP BC
+ POP BC
+ POP BC
+; 44 if (ndig > FLT_DIG)
+ LD BC,(IX+-15)
+ LD A,(IX+-12)
+ LD HL,6
+ LD E,0
+ CALL __lcmpu
+ JR NC,L_1
+; 45 _u_flt_rnd(&_info,FLT_DIG);
+ LD BC,6
+ PUSH BC
+ LD BC,__info
+ PUSH BC
+ CALL __u_flt_rnd
+ POP BC
+ POP BC
+; 46 else
+ JR L_10
+L_1:
+; 47 _u_flt_rnd(&_info,ndig);
+ LD C,(IX+-15)
+ LD B,0
+ PUSH BC
+ LD BC,__info
+ PUSH BC
+ CALL __u_flt_rnd
+ POP BC
+ POP BC
+L_10:
+; 48
+; 49 if (_info.flags == FLT_INFO_SIGN)
+ LD A,(__info)
+ CP A,1
+ JR NZ,L_9
+; 50 *(s++) = '-';
+ LD HL,(IX+-3)
+ LD (HL),45
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 51 else if (__print_fmt.flags & FMT_FLAG_PLUS)
+ JR L_12
+L_9:
+ LD A,(___print_fmt+1)
+ AND A,2
+ JR Z,L_7
+; 52 *(s++) = '+';
+ LD HL,(IX+-3)
+ LD (HL),43
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 53 else if (__print_fmt.flags & FMT_FLAG_POUND)
+ JR L_12
+L_7:
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR Z,L_12
+; 54 *(s++) = ' ';
+ LD HL,(IX+-3)
+ LD (HL),32
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+L_12:
+; 55
+; 56 *(s++) = _info.digits[0] + '0';
+ LD BC,(IX+-3)
+ LD (IX+-30),BC
+ LD BC,__info+2
+ LD (IX+-18),BC
+ LD HL,BC
+ LD A,(HL)
+ ADD A,48
+ LD HL,(IX+-30)
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 57 if (__print_fmt.precision != 0)
+ LD A,(___print_fmt+6)
+ OR A,A
+ JR Z,L_20
+; 58 *(s++) = '.';
+ LD HL,(IX+-3)
+ LD (HL),46
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+L_20:
+; 59 for (i=1; i < ndig; i++)
+ LD BC,1
+ LD (IX+-11),BC
+ XOR A,A
+ LD (IX+-8),A
+ JR L_19
+L_17:
+; 60 *(s++) = _info.digits[(unsigned char) i] + '0';
+ LD BC,(IX+-3)
+ LD (IX+-33),BC
+ LD A,(IX+-11)
+ UEXT HL
+ LD L,A
+ LD BC,(IX+-18)
+ ADD HL,BC
+ LD A,(HL)
+ ADD A,48
+ LD HL,(IX+-33)
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+ LD HL,(IX+-11)
+ LD E,(IX+-8)
+ LD A,1
+ CALL __ladd_b
+ LD (IX+-11),HL
+ LD (IX+-8),E
+L_19:
+ LD HL,(IX+-11)
+ LD E,(IX+-8)
+ LD BC,(IX+-15)
+ LD A,(IX+-12)
+ CALL __lcmpu
+ JR C,L_17
+; 61
+; 62 if (!(__print_fmt.flags & FMT_FLAG_POUND) &&
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR NZ,L_30
+; 63 (__print_fmt.type == 'g' || __print_fmt.type == 'G')) {
+ LD A,(___print_fmt+4)
+ CP A,103
+ JR Z,L_23
+ LD A,(___print_fmt+4)
+ CP A,71
+ JR Z,L_23
+ JR L_30
+; 64 while (s[-1] == '0') /* strip off trailing zero's */
+L_24:
+; 65 --s;
+ LD IY,(IX+-3)
+ LEA IY,IY+-1
+ LD (IX+-3),IY
+L_23:
+ LD BC,16777215
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD (IX+-21),HL
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,48
+ SBC HL,BC
+ JR Z,L_24
+; 66 if (s[-1] == '.')
+ LD HL,(IX+-21)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,46
+ SBC HL,BC
+ JR NZ,L_37
+; 67 --s; /* strip off . */
+ LD IY,(IX+-3)
+ LEA IY,IY+-1
+ LD (IX+-3),IY
+; 68 }
+; 69 else if (ndig == 1 && !(__print_fmt.flags & FMT_FLAG_POUND))
+ JR L_37
+L_30:
+ LD HL,(IX+-15)
+ LD E,(IX+-12)
+ LD BC,1
+ XOR A,A
+ CALL __lcmpu
+ JR NZ,L_37
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR NZ,L_37
+; 70 --s; /* remove decimal point */
+ LD IY,(IX+-3)
+ LEA IY,IY+-1
+ LD (IX+-3),IY
+L_37:
+; 71 *(s++) = isupper(__print_fmt.type) ? 'E' : 'e';
+ LD A,(___print_fmt+4)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _isupper
+ POP BC
+ CALL __icmpzero
+ JR Z,L_35
+ LD BC,69
+ LD (IX+-24),BC
+ JR L_36
+L_35:
+ LD BC,101
+ LD (IX+-24),BC
+L_36:
+ LD BC,(IX+-3)
+ LD (IX+-27),BC
+ LD A,(IX+-24)
+ LD HL,BC
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 72
+; 73 exp = _info.exp;
+ LD A,(__info+1)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD (IX+-7),HL
+ LD (IX+-4),H
+; 74 if (exp < 0) {
+ LD HL,(IX+-7)
+ LD E,(IX+-4)
+ CALL __lcmpzero
+ JP P,L_41
+; 75 *(s++) = '-';
+ LD HL,(IX+-3)
+ LD (HL),45
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 76 exp = -exp;
+ LD HL,(IX+-7)
+ LD E,(IX+-4)
+ CALL __lneg
+ LD (IX+-7),HL
+ LD (IX+-4),E
+; 77 }
+; 78 else
+ JR L_43
+L_41:
+; 79 *(s++) = '+';
+ LD HL,(IX+-3)
+ LD (HL),43
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+L_43:
+; 80
+; 81 /* For 4-byte floats, the exponent is between -37 and +38, or simply 0
+; 82 to 38 after folding. */
+; 83 /* e format always prints two digits in the exponent. */
+; 84 *(s++) = exp / 10 + '0';
+ LD BC,(IX+-3)
+ LD (IX+-36),BC
+ LD HL,(IX+-7)
+ LD E,(IX+-4)
+ LD BC,10
+ XOR A,A
+ CALL __ldivs
+ LD A,48
+ CALL __ladd_b
+ LD BC,HL
+ LD HL,(IX+-36)
+ LD (HL),C
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 85 *(s++) = exp % 10 + '0';
+ LD HL,(IX+-7)
+ LD E,(IX+-4)
+ LD BC,10
+ XOR A,A
+ CALL __lrems
+ LD A,48
+ CALL __ladd_b
+ LD BC,HL
+ LD HL,(IX+-3)
+ LD (HL),C
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 86
+; 87 *s = '\0';
+ LD HL,BC
+ LD (HL),0
+; 88 return(s);
+ LD HL,(IX+-3)
+; 89 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_dtoe ***************************
+;Name Addr/Register Size Type
+;_isupper IMPORT ----- function
+;__u_flt_rnd IMPORT ----- function
+;__info STATIC 12 variable
+;__u_flt_info IMPORT ----- function
+;___print_fmt IMPORT 19 variable
+;___print_buff IMPORT unknown variable
+;temp32 IX-27 3 variable
+;temp33 IX-24 3 variable
+;G_1 IX-21 3 variable
+;G_0 IX-18 3 variable
+;ndig IX-15 4 variable
+;i IX-11 4 variable
+;exp IX-7 4 variable
+;s IX-3 3 variable
+;n IX+6 4 parameter
+
+
+; Stack Frame Size: 48 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _isupper:ROM
+ XREF __u_flt_rnd:ROM
+ XREF __u_flt_info:ROM
+ XREF ___print_buff:ROM
+ XREF ___print_fmt:ROM
+ XREF __lcmpu:ROM
+ XREF __ldivs:ROM
+ XREF __lneg:ROM
+ XREF __lrems:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XREF __lcmpzero:ROM
+ XREF __ladd_b:ROM
+ XDEF __u_dtoe
+ XDEF __info
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/udtof.src b/frontends/calculator/CEdev/lib/shared/udtof.src new file mode 100644 index 0000000..81a40a8 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/udtof.src @@ -0,0 +1,982 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UDTOF.C"
+ .assume ADL=1
+ SEGMENT BSS
+__info:
+ DS 12
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8 #include <ctype.h>
+; 9 #include <string.h>
+; 10 #include <float.h>
+; 11
+; 12 #ifndef _MULTI_THREAD
+; 13 struct flt_info _info;
+ SEGMENT CODE
+; 14
+; 15 static char * write_f_digits(char * s, signed char exp, signed char ndig);
+; 16 static char * write_e_digits(char * s, signed char ndig);
+; 17 static char * write_exponent(char * s, char e, signed char exp);
+; 18
+; 19 #else
+; 20 static char * write_f_digits(char * s, struct fmt_type* pfmt,struct flt_info* pinfo,signed char exp, signed char ndig);
+; 21 static char * write_e_digits(char * s, struct flt_info* pinfo,signed char ndig);
+; 22 static char * write_exponent(char * s, char e, signed char exp);
+; 23 #define __print_fmt (*fmt)
+; 24 #endif
+; 25
+; 26 typedef long reg_t;
+; 27 typedef unsigned long ureg_t;
+; 28
+; 29
+; 30 /*************************************************
+; 31 *
+; 32 * _u_dtof - convert a double float to ASCII in f format
+; 33 *
+; 34 * Inputs:
+; 35 * n - value to be converted
+; 36 * s - target char array
+; 37 * fmt - format structure with conversion info
+; 38 *
+; 39 * Locals:
+; 40 * ndig - The number of significant digits to print.
+; 41 * Assumed to lie in the range [0,127].
+; 42 * For e format, this is 1 + precision.
+; 43 * For f format, this is 1 + precision + exp.
+; 44 *
+; 45 * Returns:
+; 46 * next address past the end of the string
+; 47 *
+; 48 *************************************************/
+; 49 #ifndef _MULTI_THREAD
+; 50 void _u_dtof(double n)
+; 51 #else
+; 52 char _mt_dtof(double n,char* __print_buff,struct fmt_type* fmt)
+; 53 #endif
+; 54 {
+__u_dtof:
+ LD HL,-21
+ CALL __frameset
+; 55 register reg_t ndig;
+; 56 register reg_t rdig;
+; 57 register reg_t e;
+; 58 char * s = __print_buff;
+ LD BC,___print_buff
+ LD (IX+-3),BC
+; 59 #ifdef _MULTI_THREAD
+; 60 struct flt_info _info;
+; 61 char __print_leading_char = '\0';
+; 62 #endif
+; 63
+; 64 if (__print_fmt.precision < 0)
+ LD A,(___print_fmt+6)
+ OR A,A
+ JP P,L_2
+; 65 __print_fmt.precision = DEFAULT_PRECISION;
+ LD A,6
+ LD (___print_fmt+6),A
+L_2:
+; 66
+; 67 if (__print_fmt.field_width < 0)
+ LD A,(___print_fmt+5)
+ OR A,A
+ JP P,L_3
+; 68 {
+; 69 __print_fmt.flags |= FMT_FLAG_MINUS;
+ LD A,(___print_fmt+1)
+ SET 0,A
+ LD (___print_fmt+1),A
+; 70 __print_fmt.field_width = -__print_fmt.field_width;
+ LD A,(___print_fmt+5)
+ NEG
+ LD (___print_fmt+5),A
+; 71 }
+L_3:
+; 72 rdig = ndig = __print_fmt.precision + 1;
+ LD A,(___print_fmt+6)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ CALL __itol
+ LD E,A
+ LD A,1
+ LD HL,BC
+ CALL __ladd_b
+ LD (IX+-11),HL
+ LD (IX+-8),E
+ LD A,(IX+-8)
+ LD (IX+-21),HL
+ LD (IX+-18),A
+; 73 _u_flt_info(n,&_info);
+ LD BC,__info
+ PUSH BC
+ LD C,(IX+9)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __u_flt_info
+ POP BC
+ POP BC
+ POP BC
+; 74 if ((__print_fmt.type == 'f') && (_info.exp > 0))
+ LD A,(___print_fmt+4)
+ CP A,102
+ JR NZ,L_8
+ XOR A,A
+ LD HL,__info+1
+ CP A,(HL)
+ CALL __setflag
+ JP P,L_8
+; 75 rdig += _info.exp; // May be <0.
+ LD A,(__info+1)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD E,H
+ LD A,(IX+-8)
+ LD BC,(IX+-11)
+ CALL __ladd
+ LD (IX+-21),HL
+ LD (IX+-18),E
+L_8:
+; 76
+; 77 if (rdig > FLT_DIG)
+ LD HL,6
+ LD E,0
+ LD BC,(IX+-21)
+ LD A,(IX+-18)
+ CALL __lcmps
+ CALL __setflag
+ JP P,L_7
+; 78 _u_flt_rnd(&_info, FLT_DIG+1); // Round to the last significant digit.
+ LD BC,7
+ PUSH BC
+ LD BC,__info
+ PUSH BC
+ CALL __u_flt_rnd
+ POP BC
+ POP BC
+; 79 else
+ JR L_11
+L_7:
+; 80 _u_flt_rnd(&_info, rdig); // Round into the last digit printed.
+ LD C,(IX+-21)
+ LD B,0
+ PUSH BC
+ LD BC,__info
+ PUSH BC
+ CALL __u_flt_rnd
+ POP BC
+ POP BC
+L_11:
+; 81
+; 82 if (__print_fmt.type == 'f' && (_info.exp > 0))
+ LD A,(___print_fmt+4)
+ CP A,102
+ JR NZ,L_18
+ XOR A,A
+ LD HL,__info+1
+ CP A,(HL)
+ CALL __setflag
+ JP P,L_18
+; 83 {
+; 84 ndig += _info.exp;
+ LD A,(__info+1)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD E,H
+ LD A,(IX+-8)
+ LD BC,(IX+-11)
+ CALL __ladd
+ LD (IX+-11),HL
+ LD (IX+-8),E
+; 85 }
+L_18:
+; 86
+; 87 if (_info.flags & FLT_INFO_SIGN)
+ LD A,(__info)
+ AND A,1
+ JR Z,L_17
+; 88 e = '-';
+ LD BC,45
+ LD (IX+-7),BC
+ XOR A,A
+ LD (IX+-4),A
+; 89 else if (__print_fmt.flags & FMT_FLAG_PLUS)
+ JR L_23
+L_17:
+ LD A,(___print_fmt+1)
+ AND A,2
+ JR Z,L_15
+; 90 e = '+';
+ LD BC,43
+ LD (IX+-7),BC
+ XOR A,A
+ LD (IX+-4),A
+; 91 else if (__print_fmt.flags & FMT_FLAG_SPACE)
+ JR L_23
+L_15:
+ LD A,(___print_fmt+1)
+ AND A,4
+ JR Z,L_13
+; 92 e = ' ';
+ LD BC,32
+ LD (IX+-7),BC
+ XOR A,A
+ LD (IX+-4),A
+; 93 else
+ JR L_23
+L_13:
+; 94 e = '\0';
+ LD BC,0
+ LD (IX+-7),BC
+ XOR A,A
+ LD (IX+-4),A
+L_23:
+; 95 if (__print_fmt.flags & FMT_FLAG_PAD_ZERO)
+ LD A,(___print_fmt+1)
+ AND A,64
+ JR Z,L_22
+; 96 __print_leading_char = e;
+ LD A,(IX+-7)
+ LD (___print_leading_char),A
+; 97 else if (e)
+ JR L_29
+L_22:
+ LD HL,(IX+-7)
+ LD E,(IX+-4)
+ CALL __lcmpzero
+ JR Z,L_29
+; 98 *(s++) = e;
+ LD A,(IX+-7)
+ LD HL,(IX+-3)
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+L_29:
+; 99
+; 100 if (_info.flags & FLT_INFO_INF)
+ LD A,(__info)
+ AND A,2
+ JR Z,L_34
+; 101 {
+; 102 /* This is infinity (+ or -). */
+; 103 if (__print_fmt.flags & FMT_FLAG_UPPERCASE)
+ LD A,(___print_fmt+1)
+ AND A,32
+ JR Z,L_25
+; 104 strcpy(s,"INF");
+ LD BC,L__14
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _strcpy
+ POP BC
+ POP BC
+; 105 else
+ JR L_26
+L_25:
+; 106 strcpy(s,"inf");
+ LD BC,L__15
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _strcpy
+ POP BC
+ POP BC
+; 107 goto out;
+ JR L_26
+; 108 }
+L_34:
+; 109
+; 110 if (_info.flags & FLT_INFO_NAN)
+ LD A,(__info)
+ AND A,4
+ JR Z,L_36
+; 111 {
+; 112 /* This is not a number (+ or -). */
+; 113 if (__print_fmt.flags & FMT_FLAG_UPPERCASE)
+ LD A,(___print_fmt+1)
+ AND A,32
+ JR Z,L_31
+; 114 strcpy(s,"NAN");
+ LD BC,L__18
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _strcpy
+ POP BC
+ POP BC
+; 115 else
+ JR L_26
+L_31:
+; 116 strcpy(s,"nan");
+ LD BC,L__19
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _strcpy
+ POP BC
+ POP BC
+; 117 goto out;
+ JR L_26
+; 118 }
+L_36:
+; 119
+; 120 if (__print_fmt.type == 'e')
+ LD A,(___print_fmt+4)
+ CP A,101
+ JR NZ,L_38
+; 121 #ifndef _MULTI_THREAD
+; 122 s = write_e_digits(s, ndig);
+ LD C,(IX+-11)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _write_e_digits
+ POP BC
+ POP BC
+ LD (IX+-3),HL
+L_38:
+; 123 #else
+; 124 s = write_e_digits(s,&_info,ndig);
+; 125 #endif
+; 126 if (__print_fmt.type == 'f')
+ LD A,(___print_fmt+4)
+ CP A,102
+ JR NZ,L_44
+; 127 #ifndef _MULTI_THREAD
+; 128 s = write_f_digits(s, _info.exp, ndig);
+ LD C,(IX+-11)
+ LD A,(__info+1)
+ LD B,0
+ PUSH BC
+ LD C,A
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _write_f_digits
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+-3),HL
+L_44:
+; 129 #else
+; 130 s = write_f_digits(s,fmt,&_info,_info.exp,ndig);
+; 131 #endif
+; 132
+; 133 /* If g format and not #, strip of trailing zeros. */
+; 134 if (__print_fmt.flags & FMT_FLAG_STRIP)
+ LD A,(___print_fmt+1)
+ AND A,128
+ JR Z,L_48
+; 135 {
+; 136 __print_fmt.pad_post_fract = 0;
+ XOR A,A
+ LD (___print_fmt+15),A
+; 137 while (s[-1] == '0') /* strip off trailing zero's */
+ JR L_39
+L_40:
+; 138 --s;
+ LD IY,(IX+-3)
+ LEA IY,IY+-1
+ LD (IX+-3),IY
+L_39:
+ LD BC,16777215
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD (IX+-17),HL
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,48
+ SBC HL,BC
+ JR Z,L_40
+; 139 if (s[-1] == '.')
+ LD HL,(IX+-17)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,46
+ SBC HL,BC
+ JR NZ,L_48
+; 140 __print_fmt.pad_pre_fract = 0;
+ XOR A,A
+ LD (___print_fmt+14),A
+; 141 }
+L_48:
+; 142 /* Strip off the trailing decimal point, unless prevented by #. */
+; 143 if (s[-1] == '.' &&
+ LD BC,16777215
+ LD HL,(IX+-3)
+ ADD HL,BC
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,46
+ SBC HL,BC
+ JR NZ,L_54
+; 144 ((__print_fmt.pad_pre_fract+__print_fmt.pad_post_fract) == 0) &&
+ LD A,(___print_fmt+14)
+ UEXT HL
+ LD L,A
+ LD BC,HL
+ LD A,(___print_fmt+15)
+ UEXT HL
+ LD L,A
+ ADD HL,BC
+ CALL __icmpzero
+ JR NZ,L_54
+; 145 !(__print_fmt.flags & FMT_FLAG_POUND))
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR NZ,L_54
+; 146 --s;
+ LD IY,(IX+-3)
+ LEA IY,IY+-1
+ LD (IX+-3),IY
+L_54:
+; 147
+; 148 if (__print_fmt.type == 'e')
+ LD A,(___print_fmt+4)
+ CP A,101
+ JR NZ,L_55
+; 149 {
+; 150 e = __print_fmt.flags & FMT_FLAG_UPPERCASE ? 'E' : 'e';
+ LD A,(___print_fmt+1)
+ AND A,32
+ JR Z,L_51
+ LD BC,69
+ LD (IX+-14),BC
+ JR L_52
+L_51:
+ LD BC,101
+ LD (IX+-14),BC
+L_52:
+ LD BC,(IX+-14)
+ CALL __itol
+ LD (IX+-7),BC
+ LD (IX+-4),A
+; 151 s = write_exponent(s, e, _info.exp);
+ LD A,(__info+1)
+ LD C,A
+ LD B,0
+ PUSH BC
+ LD C,(IX+-7)
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL _write_exponent
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+-3),HL
+; 152 }
+L_55:
+; 153
+; 154 *s = '\0';
+ LD HL,(IX+-3)
+ LD (HL),0
+L_26:
+; 155 out:;
+; 156 #ifdef _MULTI_THREAD
+; 157 return __print_leading_char;
+; 158 #endif
+; 159 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_dtof ***************************
+;Name Addr/Register Size Type
+;_write_exponent STATIC ----- function
+;_write_f_digits STATIC ----- function
+;_write_e_digits STATIC ----- function
+;_strcpy IMPORT ----- function
+;___print_leading_char IMPORT 1 variable
+;__u_flt_rnd IMPORT ----- function
+;__info STATIC 12 variable
+;__u_flt_info IMPORT ----- function
+;___print_fmt IMPORT 19 variable
+;___print_buff IMPORT unknown variable
+;rdig IX-21 4 variable
+;G_0 IX-17 3 variable
+;temp49 IX-14 3 variable
+;ndig IX-11 4 variable
+;e IX-7 4 variable
+;s IX-3 3 variable
+;n IX+6 4 parameter
+
+
+; Stack Frame Size: 33 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ SEGMENT STRSECT
+L__14:
+ DB "INF"
+ DB 0
+L__15:
+ DB "inf"
+ DB 0
+L__18:
+ DB "NAN"
+ DB 0
+L__19:
+ DB "nan"
+ DB 0
+ SEGMENT CODE
+; 160
+; 161 #ifdef _MULTI_THREAD
+; 162 #define _info (*pinfo)
+; 163 #endif
+; 164
+; 165 /*
+; 166 * exp+1- counts the number of digits to the left of the decimal point
+; 167 * ndig - counts the number of significant digits to print.
+; 168 */
+; 169 #ifndef _MULTI_THREAD
+; 170 static char * write_f_digits(char * s, signed char exp, signed char ndig)
+; 171 #else
+; 172 static char * write_f_digits(char * s, struct fmt_type* fmt,struct flt_info* pinfo,signed char exp, signed char ndig)
+; 173 #endif
+; 174 {
+_write_f_digits:
+ LD HL,-13
+ CALL __frameset
+; 175 ureg_t i = 0;
+ LD BC,0
+ LD (IX+-4),BC
+ XOR A,A
+ LD (IX+-1),A
+; 176
+; 177 /* Emit a leading zero, if needed. */
+; 178 if (exp < 0) {
+ LD A,(IX+9)
+ OR A,A
+ JP P,L_62
+; 179 *(s++) = '0';
+ LD HL,(IX+6)
+ LD (HL),48
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 180 --ndig;
+ DEC (IX+12)
+; 181 }
+; 182
+; 183 while (exp >= 0 && i < MAXDIGITS)
+ JR L_62
+L_63:
+; 184 {
+; 185 *(s++) = _info.digits[i++] + '0';
+ LD HL,(IX+-4)
+ LD BC,(IX+6)
+ LD (IX+-7),BC
+ LD IY,(IX+-7)
+ LD BC,__info+2
+ ADD HL,BC
+ LD A,(HL)
+ ADD A,48
+ LD (IY),A
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ LD A,1
+ CALL __ladd_b
+ LD (IX+-4),HL
+ LD (IX+-1),E
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 186 --ndig; --exp;
+ DEC (IX+12)
+ DEC (IX+9)
+; 187 }
+L_62:
+ LD A,(IX+9)
+ OR A,A
+ JP M,L_65
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ LD BC,10
+ XOR A,A
+ CALL __lcmpu
+ JR C,L_63
+L_65:
+; 188 __print_fmt.pad_at = s;
+ LD BC,(IX+6)
+ LD (___print_fmt+16),BC
+; 189 if (exp >= 0) {
+ LD A,(IX+9)
+ OR A,A
+ JP M,L_68
+; 190 __print_fmt.pad_whole = exp+1;
+ LD A,(IX+9)
+ INC A
+ LD (___print_fmt+13),A
+; 191 ndig -= (exp+1);
+ LD B,(IX+9)
+ LD A,(IX+12)
+ INC B
+ SUB A,B
+ LD (IX+12),A
+; 192 exp = -1;
+ LD (IX+9),255
+; 193 }
+L_68:
+; 194
+; 195 *(s++) = '.';
+ LD BC,(IX+6)
+ LD (IX+-10),BC
+ LD HL,BC
+ LD (HL),46
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 196
+; 197
+; 198 if (exp < -1) {
+ LD A,(IX+9)
+ CP A,-1
+ CALL __setflag
+ JP P,L_75
+; 199 if (ndig > (-exp-1)) {
+ LD A,(IX+9)
+ SEXT HL
+ LD L,(IX+9)
+ CALL __ineg
+ LD BC,HL
+ DEC BC
+ LD A,(IX+12)
+ SEXT HL
+ LD L,(IX+12)
+ LD DE,HL
+ LD HL,BC
+ OR A,A
+ SBC HL,DE
+ CALL __setflag
+ JP P,L_70
+; 200 __print_fmt.pad_pre_fract = -(exp+1);
+ LD A,(IX+9)
+ INC A
+ NEG
+ LD (___print_fmt+14),A
+; 201 ndig -= -(exp+1);
+ LD A,(IX+9)
+ INC A
+ NEG
+ LD B,A
+ LD A,(IX+12)
+ SUB A,B
+ LD (IX+12),A
+; 202 exp = -1;
+; 203 }
+; 204 else {
+ JR L_75
+L_70:
+; 205 __print_fmt.pad_pre_fract = ndig;
+ LD A,(IX+12)
+ LD (___print_fmt+14),A
+; 206 ndig = 0;
+ LD (IX+12),0
+; 207 }
+; 208 }
+; 209 while (ndig > 0 && i < MAXDIGITS)
+ JR L_75
+L_76:
+; 210 {
+; 211 *(s++) = _info.digits[i++] + '0';
+ LD HL,(IX+-4)
+ LD BC,(IX+6)
+ LD (IX+-13),BC
+ LD IY,(IX+-13)
+ LD BC,__info+2
+ ADD HL,BC
+ LD A,(HL)
+ ADD A,48
+ LD (IY),A
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ LD A,1
+ CALL __ladd_b
+ LD (IX+-4),HL
+ LD (IX+-1),E
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 212 --ndig;
+ DEC (IX+12)
+; 213 }
+L_75:
+ XOR A,A
+ CP A,(IX+12)
+ CALL __setflag
+ JP P,L_79
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ LD BC,10
+ XOR A,A
+ CALL __lcmpu
+ JR C,L_76
+L_79:
+; 214 if (ndig > 0) {
+ XOR A,A
+ CP A,(IX+12)
+ CALL __setflag
+ JP P,L_80
+; 215 __print_fmt.pad_post_fract =ndig;
+ LD A,(IX+12)
+ LD (___print_fmt+15),A
+; 216 ndig = 0;
+; 217 }
+L_80:
+; 218
+; 219 return s;
+ LD HL,(IX+6)
+; 220 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _write_f_digits ***************************
+;Name Addr/Register Size Type
+;___print_fmt IMPORT 19 variable
+;__info STATIC 12 variable
+;i IX-4 4 variable
+;ndig IX+12 1 parameter
+;exp IX+9 1 parameter
+;s IX+6 3 parameter
+
+
+; Stack Frame Size: 28 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 221
+; 222 #ifndef _MULTI_THREAD
+; 223 static char * write_e_digits(char * s, signed char ndig)
+; 224 #else
+; 225 static char * write_e_digits(char * s,struct flt_info* pinfo, signed char ndig)
+; 226 #endif
+; 227 {
+_write_e_digits:
+ LD HL,-7
+ CALL __frameset
+; 228 ureg_t i = 0;
+; 229
+; 230 /* Emit the single digit to the left of the decimal point. */
+; 231 *(s++) = _info.digits[i++] + '0';
+ LD A,(__info+2)
+ ADD A,48
+ LD HL,(IX+6)
+ LD (HL),A
+ LD BC,1
+ LD (IX+-4),BC
+ XOR A,A
+ LD (IX+-1),A
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 232 --ndig;
+ DEC (IX+9)
+; 233
+; 234 /* Emit the decimal point. */
+; 235 *(s++) = '.';
+ LD HL,BC
+ LD (HL),46
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 236
+; 237 /* Emit the digits. */
+; 238 while (ndig-- > 0 && i < MAXDIGITS)
+ JR L_89
+L_90:
+; 239 *(s++) = _info.digits[i++] + '0';
+ LD HL,(IX+-4)
+ LD BC,(IX+6)
+ LD DE,__info+2
+ ADD HL,DE
+ LD (IX+-7),BC
+ LD A,(HL)
+ ADD A,48
+ LD HL,BC
+ LD (HL),A
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ LD A,1
+ CALL __ladd_b
+ LD (IX+-4),HL
+ LD (IX+-1),E
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_89:
+ LD B,(IX+9)
+ DEC (IX+9)
+ XOR A,A
+ CP A,B
+ CALL __setflag
+ JP P,L_91
+ LD HL,(IX+-4)
+ LD E,(IX+-1)
+ LD BC,10
+ XOR A,A
+ CALL __lcmpu
+ JR C,L_90
+L_91:
+; 240
+; 241 return s;
+ LD HL,(IX+6)
+; 242 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _write_e_digits ***************************
+;Name Addr/Register Size Type
+;__info STATIC 12 variable
+;i IX-4 4 variable
+;ndig IX+9 1 parameter
+;s IX+6 3 parameter
+
+
+; Stack Frame Size: 19 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 243
+; 244 static char * write_exponent(char * s, char e, signed char exp)
+; 245 {
+_write_exponent:
+ LD HL,-3
+ CALL __frameset
+; 246 /* Emit the exponent specifier. */
+; 247 *(s++) = e;
+ LD HL,(IX+6)
+ LD A,(IX+9)
+ LD (HL),A
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 248
+; 249 /* Emit the exponent sign. */
+; 250 if (exp < 0) {
+ LD A,(IX+12)
+ OR A,A
+ JP P,L_97
+; 251 *(s++) = '-';
+ LD HL,(IX+6)
+ LD (HL),45
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 252 exp = -exp;
+ LD A,(IX+12)
+ NEG
+ LD (IX+12),A
+; 253 }
+; 254 else
+ JR L_99
+L_97:
+; 255 *(s++) = '+';
+ LD HL,(IX+6)
+ LD (HL),43
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_99:
+; 256
+; 257 /* Emit the two-digit exponent. */
+; 258 /* For 4-byte floats, the exponent is between -37 and +38, or simply 0
+; 259 to 38 after folding. */
+; 260 *(s++) = exp / 10 + '0';
+ LD BC,(IX+6)
+ LD (IX+-3),BC
+ LD A,(IX+12)
+ SEXT HL
+ LD L,(IX+12)
+ LD BC,10
+ CALL __idivs
+ LD IY,HL
+ LEA HL,IY+48
+ LD IY,(IX+-3)
+ LD (IY),L
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 261 *(s++) = exp % 10 + '0';
+ LD A,(IX+12)
+ SEXT HL
+ LD L,(IX+12)
+ LD BC,10
+ CALL __irems
+ LD IY,HL
+ LEA HL,IY+48
+ LD IY,(IX+6)
+ LD (IY),L
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 262
+; 263 return s;
+ LD HL,BC
+; 264 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _write_exponent ***************************
+;Name Addr/Register Size Type
+;exp IX+12 1 parameter
+;e IX+9 1 parameter
+;s IX+6 3 parameter
+
+
+; Stack Frame Size: 18 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _strcpy:ROM
+ XREF __u_flt_rnd:ROM
+ XREF __u_flt_info:ROM
+ XREF ___print_leading_char:ROM
+ XREF ___print_buff:ROM
+ XREF ___print_fmt:ROM
+ XREF __lcmps:ROM
+ XREF __lcmpu:ROM
+ XREF __ladd:ROM
+ XREF __idivs:ROM
+ XREF __ineg:ROM
+ XREF __irems:ROM
+ XREF __itol:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XREF __icmpzero:ROM
+ XREF __lcmpzero:ROM
+ XREF __ladd_b:ROM
+ XDEF __u_dtof
+ XDEF __info
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/udtog.src b/frontends/calculator/CEdev/lib/shared/udtog.src new file mode 100644 index 0000000..cd584be --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/udtog.src @@ -0,0 +1,173 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UDTOG.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 /*************************************************
+; 10 *
+; 11 * _u_dtog - convert a double float to ASCII in g format
+; 12 *
+; 13 * Inputs:
+; 14 * n - value to be converted
+; 15 * s - target char array
+; 16 * fmt - format structure with conversion info
+; 17 *
+; 18 * Returns:
+; 19 * next address past the end of the string
+; 20 *
+; 21 *************************************************/
+; 22 #ifndef _MULTI_THREAD
+; 23 void _u_dtog(double n)
+; 24 #else
+; 25 char _mt_dtog(double n,char* __print_buff,struct fmt_type* fmt)
+; 26 #define __print_fmt (*fmt)
+; 27 #define _u_dtof(n) _mt_dtof(n,__print_buff,fmt)
+; 28 #endif
+; 29 {
+__u_dtog:
+ LD HL,-12
+ CALL __frameset
+; 30 struct flt_info _info;
+; 31
+; 32 _u_flt_info(n, &_info);
+ PEA IX+-12
+ LD C,(IX+9)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __u_flt_info
+ POP BC
+ POP BC
+ POP BC
+; 33
+; 34 if (__print_fmt.precision < 0)
+ LD A,(___print_fmt+6)
+ OR A,A
+ JP P,L_2
+; 35 __print_fmt.precision = 0;
+ XOR A,A
+ LD (___print_fmt+6),A
+L_2:
+; 36
+; 37 if (__print_fmt.field_width < 0)
+ LD A,(___print_fmt+5)
+ OR A,A
+ JP P,L_4
+; 38 {
+; 39 __print_fmt.flags |= FMT_FLAG_MINUS;
+ LD A,(___print_fmt+1)
+ SET 0,A
+ LD (___print_fmt+1),A
+; 40 __print_fmt.field_width = -__print_fmt.field_width;
+ LD A,(___print_fmt+5)
+ NEG
+ LD (___print_fmt+5),A
+; 41 }
+L_4:
+; 42
+; 43 if (!(__print_fmt.flags & FMT_FLAG_POUND))
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR NZ,L_6
+; 44 __print_fmt.flags |= FMT_FLAG_STRIP;
+ LD A,(___print_fmt+1)
+ SET 7,A
+ LD (___print_fmt+1),A
+L_6:
+; 45
+; 46 // ISO Spec: The precision is the maximal number of significant digits
+; 47 // if the precision is zero it is taken as one.
+; 48 if (!__print_fmt.precision)
+ LD A,(___print_fmt+6)
+ OR A,A
+ JR NZ,L_10
+; 49 __print_fmt.precision=1;
+ LD A,1
+ LD (___print_fmt+6),A
+L_10:
+; 50
+; 51 if ( _info.exp < MINEXP
+; 52 || _info.exp >= __print_fmt.precision)
+ LD A,(IX+-11)
+ CP A,-4
+ JP M,L_8
+ LD A,(IX+-11)
+ LD HL,___print_fmt+6
+ CP A,(HL)
+ CALL __setflag
+ JP M,L_9
+L_8:
+; 53 {
+; 54 --__print_fmt.precision;
+ LD A,(___print_fmt+6)
+ DEC A
+ LD (___print_fmt+6),A
+; 55 __print_fmt.type = 'e';
+ LD A,101
+ LD (___print_fmt+4),A
+; 56 }
+; 57 else
+ JR L_11
+L_9:
+; 58 {
+; 59 __print_fmt.precision -= (1 + _info.exp);
+ LD B,(IX+-11)
+ INC B
+ LD A,(___print_fmt+6)
+ SUB A,B
+ LD (___print_fmt+6),A
+; 60 __print_fmt.type = 'f';
+ LD A,102
+ LD (___print_fmt+4),A
+; 61 }
+L_11:
+; 62
+; 63 #ifndef _MULTI_THREAD
+; 64 _u_dtof(n);
+ LD C,(IX+9)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __u_dtof
+ POP BC
+ POP BC
+; 65 #else
+; 66 return(_u_dtof(n));
+; 67 #endif
+; 68 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_dtog ***************************
+;Name Addr/Register Size Type
+;__u_dtof IMPORT ----- function
+;___print_fmt IMPORT 19 variable
+;__u_flt_info IMPORT ----- function
+;_info IX-12 12 variable
+;n IX+6 4 parameter
+
+
+; Stack Frame Size: 24 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __u_flt_info:ROM
+ XREF __u_dtof:ROM
+ XREF ___print_fmt:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XDEF __u_dtog
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/uitoa.src b/frontends/calculator/CEdev/lib/shared/uitoa.src new file mode 100644 index 0000000..4399172 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uitoa.src @@ -0,0 +1,65 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UITOA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 /*************************************************
+; 10 *
+; 11 * _u_itoa - convert an integer to a number of base rad
+; 12 *
+; 13 * Inputs:
+; 14 * int - int to be converted
+; 15 * str - target char array
+; 16 * rad - radix
+; 17 * fmt - format structure with conversion info
+; 18 *
+; 19 * Returns:
+; 20 * next address past the end of the string
+; 21 *
+; 22 *************************************************/
+; 23 #ifndef _MULTI_THREAD
+; 24 void _u_itoa(int n)
+; 25 {
+__u_itoa:
+ CALL __frameset0
+; 26 _u_ltoa((long)n);
+ LD BC,(IX+6)
+ CALL __itol
+ LD DE,BC
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL __u_ltoa
+ POP BC
+ POP BC
+; 27 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_itoa ***************************
+;Name Addr/Register Size Type
+;__u_ltoa IMPORT ----- function
+;n IX+6 3 parameter
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __u_ltoa:ROM
+ XREF __itol:ROM
+ XREF __frameset0:ROM
+ XDEF __u_itoa
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/uldiv.src b/frontends/calculator/CEdev/lib/shared/uldiv.src new file mode 100644 index 0000000..6acdeac --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uldiv.src @@ -0,0 +1,128 @@ +; (c) Copyright 1999-2008 Zilog, Inc. +;------------------------------------------------------------------------- +; Unsigned Long Division. +; Input: +; Operand1: +; (ix+9) : high word,high byte +; (ix+8) : high word,low byte +; (ix+7) : low word,high byte +; (ix+6) : low word,low byte +; +; Operand2: +; (ix+15) : high word,high byte +; (ix+14) : high word,low byte +; (ix+13) : low word,high byte +; (ix+12) : low word,low byte +; +; Output: +; Result: b : high byte +; de : low byte +; Registers Used: +; a,b,c,d,e,h,l,iy +;------------------------------------------------------------------------- + .assume adl=1 + .def .uldiv + +.uldiv: + push ix + ld ix,0 + add ix,sp + + ld de,0 ;res = 0; + ld b,0 + + ld hl,0 ;num = 0 + ld c,0 + + ld iy,32 ;i = 32; + +loop: + ;res = res << 1 + ex de,hl + add hl,hl + ld a,b + adc a,b + ld b,a + ex de,hl + + ;num = num << 1 + add hl,hl + ld a,c + adc a,c + ld c,a + + ;x = x << 1 + ld a,(ix+6) + add a,(ix+6) + ld (ix+6),a + ld a,(ix+7) + adc a,(ix+7) + ld (ix+7),a + ld a,(ix+8) + adc a,(ix+8) + ld (ix+8),a + ld a,(ix+9) + adc a,(ix+9) + ld (ix+9),a + + + push de + + ;num = num + carry + + ld de,0 + adc hl,de + ld a,c + adc a,d + ld c,a + + + ;num = num - y + ld de,(ix+12) + or a,a + sbc hl,de + ld a,c + ld d,(ix+15) + sbc a,d + ld c,a + + pop de + jr c, out ;if (num < y) goto out + + inc de ;res = res | 1 + + jr done ;goto done + +out: + push de + ;num = num + y + ld de,(ix+12) + add hl,de + ld a,c + ld d,(ix+15) + adc a,d + ld c,a + + pop de + +done: + ;i--, if (i != 0) go to loop + dec iyl + jr nz,loop + + + pop ix + ret + + .def .uldivbdechl +.uldivbdechl: + push bc + push hl + ld c,b + push bc + push de + call .uldiv + ld iy,12 + add iy,sp + ld sp,iy + ret diff --git a/frontends/calculator/CEdev/lib/shared/ultoa.src b/frontends/calculator/CEdev/lib/shared/ultoa.src new file mode 100644 index 0000000..d57f344 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ultoa.src @@ -0,0 +1,472 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\ULTOA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 #ifndef _PTR_
+; 10 #define _PTR_ *
+; 11 #endif
+; 12
+; 13
+; 14 /*************************************************
+; 15 *
+; 16 * _u_ltoa - convert a long to a number of base rad
+; 17 *
+; 18 * Inputs:
+; 19 * lng - long to be converted
+; 20 * str - target char array
+; 21 * rad - radix
+; 22 * fmt - format structure with conversion info
+; 23 *
+; 24 * Returns:
+; 25 * next address past the end of the string
+; 26 *
+; 27 *************************************************/
+; 28
+; 29 void __print_sendstring(char *sp);
+; 30
+; 31 #ifndef _MULTI_THREAD
+; 32 void _u_ltoa(long val)
+; 33 #else
+; 34 char _mt_ltoa(long val,char* __print_buff,struct fmt_type* print_fmt)
+; 35 #define __print_fmt (*print_fmt)
+; 36 #endif
+; 37 {
+__u_ltoa:
+ LD HL,-37
+ CALL __frameset
+; 38 unsigned char a;
+; 39 unsigned char t;
+; 40 unsigned char sign;
+; 41 char _PTR_ s = __print_buff;
+ LD BC,___print_buff
+ LD (IX+-3),BC
+; 42 unsigned char nonzero;
+; 43 unsigned long uval;
+; 44 char rad;
+; 45 #ifdef _MULTI_THREAD
+; 46 char __print_leading_char = '\0';
+; 47 #endif
+; 48
+; 49 sign = val < 0;
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __lcmpzero
+ CALL __setflag
+ JP P,L__1
+ LD A,1
+ JR L__2
+L__1:
+ XOR A,A
+L__2:
+ LD (IX+-11),A
+; 50 uval = sign ? -val : val;
+ OR A,A
+ JR Z,L_2
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __lneg
+ LD (IX+-16),HL
+ LD (IX+-13),E
+ JR L_3
+L_2:
+ LD BC,(IX+6)
+ LD A,(IX+9)
+ LD (IX+-16),BC
+ LD (IX+-13),A
+L_3:
+ LD BC,(IX+-16)
+ LD A,(IX+-13)
+ LD (IX+-10),BC
+ LD (IX+-7),A
+ OR A,A
+; 51 nonzero = (uval > 0);
+ SBC HL,HL
+ LD E,0
+ CALL __lcmpu
+ JR NC,L__5
+ LD A,1
+ JR L__6
+L__5:
+ XOR A,A
+L__6:
+ LD (IX+-12),A
+; 52
+; 53 if (__print_fmt.precision < 0)
+ LD A,(___print_fmt+6)
+ OR A,A
+ JP P,L_6
+; 54 __print_fmt.precision = 1;
+ LD A,1
+ LD (___print_fmt+6),A
+L_6:
+; 55
+; 56 if (__print_fmt.field_width < 0)
+ LD A,(___print_fmt+5)
+ OR A,A
+ JP P,L_7
+; 57 {
+; 58 __print_fmt.flags |= FMT_FLAG_MINUS;
+ LD A,(___print_fmt+1)
+ SET 0,A
+ LD (___print_fmt+1),A
+; 59 __print_fmt.field_width = -__print_fmt.field_width;
+ LD A,(___print_fmt+5)
+ NEG
+ LD (___print_fmt+5),A
+; 60 }
+L_7:
+; 61
+; 62 a = 'A';
+ LD (IX+-4),65
+; 63 switch (__print_fmt.type)
+ LD A,(___print_fmt+4)
+ LD B,A
+ SEXT HL
+ LD L,B
+ CALL __case8
+L__9:
+ DW 7
+ DB 88
+ DW24 L_16
+
+ DB 100
+ DW24 L_9
+
+ DB 105
+ DW24 L_10
+
+ DB 111
+ DW24 L_12
+
+ DB 112
+ DW24 L_14
+
+ DB 117
+ DW24 L_11
+
+ DB 120
+ DW24 L_13
+
+ DW24 L_8
+
+; 64 {
+; 65 default:
+L_8:
+; 66 case 'd':
+L_9:
+; 67 case 'i':
+L_10:
+; 68 case 'u':
+L_11:
+; 69 rad = 10;
+ LD (IX+-5),10
+; 70 break;
+ JR L_22
+; 71 case 'o':
+L_12:
+; 72 rad = 0;
+ LD (IX+-5),0
+; 73 break;
+ JR L_22
+; 74 case 'x':
+L_13:
+; 75 case 'p':
+L_14:
+; 76 if ( !(__print_fmt.flags&FMT_FLAG_UPPERCASE))
+ LD A,(___print_fmt+1)
+ AND A,32
+ JR NZ,L_16
+; 77 a = 'a';
+ LD (IX+-4),97
+; 78 // Fall into next case
+; 79 case 'X':
+L_16:
+; 80 rad = 16;
+ LD (IX+-5),16
+; 81 break;
+; 82 }
+; 83 do
+L_22:
+; 84 { /* generate digits in reverse order */
+; 85 t = uval % rad;
+ LD A,(IX+-5)
+ SEXT HL
+ LD L,(IX+-5)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+-10)
+ LD E,(IX+-7)
+ CALL __lremu
+ LD BC,HL
+ LD (IX+-6),C
+; 86 if (t > 9)
+ LD A,9
+ CP A,(IX+-6)
+ JR NC,L_21
+; 87 *(s++) = (t - 10) + a;
+ LD BC,(IX+-3)
+ LD (IX+-19),BC
+ LD A,(IX+-6)
+ ADD A,-10
+ ADD A,(IX+-4)
+ LD HL,BC
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 88 else
+ JR L_23
+L_21:
+; 89 *(s++) = t + '0';
+ LD BC,(IX+-3)
+ LD (IX+-22),BC
+ LD A,(IX+-6)
+ ADD A,48
+ LD HL,BC
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 90 } while (uval /= rad);
+L_23:
+ LD A,(IX+-5)
+ SEXT HL
+ LD L,(IX+-5)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+-10)
+ LD E,(IX+-7)
+ CALL __ldivu
+ LD (IX+-10),HL
+ LD (IX+-7),E
+ LD HL,(IX+-10)
+ LD E,(IX+-7)
+ CALL __lcmpzero
+ JR NZ,L_22
+; 91
+; 92 while (s - __print_buff < (unsigned char) __print_fmt.precision) {
+ JR L_26
+L_27:
+; 93 *(s++) = '0';
+ LD BC,(IX+-3)
+ LD (IX+-25),BC
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 94 }
+L_26:
+ LD A,(___print_fmt+6)
+ UEXT HL
+ LD L,A
+ LD DE,HL
+ LD HL,(IX+-3)
+ OR A,A
+ LD BC,___print_buff
+ SBC HL,BC
+ OR A,A
+ SBC HL,DE
+ JP M,L_27
+; 95 if (__print_fmt.flags & FMT_FLAG_POUND) {
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR Z,L_48
+; 96 if (nonzero) {
+ LD A,(IX+-12)
+ OR A,A
+ JR Z,L_48
+; 97 if (rad == 16) {
+ LD A,(IX+-5)
+ CP A,16
+ JR NZ,L_38
+; 98 *(s++) = 'X';
+ LD BC,(IX+-3)
+ LD (IX+-28),BC
+ LD HL,BC
+ LD (HL),88
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 99 *(s++) = '0';
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 100 }
+; 101 else if (rad == 116) {
+ JR L_48
+L_38:
+ LD A,(IX+-5)
+ CP A,116
+ JR NZ,L_36
+; 102 *(s++) = 'x';
+ LD BC,(IX+-3)
+ LD (IX+-31),BC
+ LD HL,BC
+ LD (HL),120
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 103 *(s++) = '0';
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 104 }
+; 105 else if (rad == 8) {
+ JR L_48
+L_36:
+ LD A,(IX+-5)
+ CP A,8
+ JR NZ,L_48
+; 106 *(s++) = '0';
+ LD BC,(IX+-3)
+ LD (IX+-34),BC
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 107 }
+; 108 }
+; 109 }
+L_48:
+; 110
+; 111 if (sign)
+ LD A,(IX+-11)
+ OR A,A
+ JR Z,L_47
+; 112 a = '-';
+ LD (IX+-4),45
+; 113 else if (__print_fmt.flags & FMT_FLAG_PLUS)
+ JR L_50
+L_47:
+ LD A,(___print_fmt+1)
+ AND A,2
+ JR Z,L_45
+; 114 a = '+';
+ LD (IX+-4),43
+; 115 else if (__print_fmt.flags & FMT_FLAG_SPACE)
+ JR L_50
+L_45:
+ LD A,(___print_fmt+1)
+ AND A,4
+ JR Z,L_43
+; 116 a = ' ';
+ LD (IX+-4),32
+; 117 else
+ JR L_50
+L_43:
+; 118 a = '\0';
+ LD (IX+-4),0
+L_50:
+; 119
+; 120 // ISO Spec: If a precision is specified the zero flag is ignored
+; 121 if (__print_fmt.precision )
+ LD A,(___print_fmt+6)
+ OR A,A
+ JR Z,L_55
+; 122 __print_fmt.flags &= ~FMT_FLAG_PAD_ZERO;
+ LD A,(___print_fmt+1)
+ RES 6,A
+ LD (___print_fmt+1),A
+L_55:
+; 123
+; 124 if ( __print_fmt.flags & FMT_FLAG_PAD_ZERO)
+ LD A,(___print_fmt+1)
+ AND A,64
+ JR Z,L_54
+; 125 __print_leading_char = a;
+ LD A,(IX+-4)
+ LD (___print_leading_char),A
+; 126 else if (a)
+ JR L_56
+L_54:
+ LD A,(IX+-4)
+ OR A,A
+ JR Z,L_56
+; 127 *(s++) = a;
+ LD BC,(IX+-3)
+ LD (IX+-37),BC
+ LD HL,BC
+ LD A,(IX+-4)
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+L_56:
+; 128
+; 129 *s = '\0';
+ LD HL,(IX+-3)
+; 130
+; 131 _u_reverse(__print_buff);
+ LD BC,___print_buff
+ PUSH BC
+ LD (HL),0
+ CALL __u_reverse
+ POP BC
+; 132 #ifndef _MULTI_THREAD
+; 133 __print_sendstring(__print_buff);
+ LD BC,___print_buff
+ PUSH BC
+ CALL ___print_sendstring
+ POP BC
+; 134 #else
+; 135 return __print_leading_char;
+; 136 #endif
+; 137 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_ltoa ***************************
+;Name Addr/Register Size Type
+;___print_sendstring IMPORT ----- function
+;__u_reverse IMPORT ----- function
+;___print_leading_char IMPORT 1 variable
+;___print_fmt IMPORT 19 variable
+;___print_buff IMPORT unknown variable
+;temp0 IX-16 4 variable
+;nonzero IX-12 1 variable
+;sign IX-11 1 variable
+;uval IX-10 4 variable
+;t IX-6 1 variable
+;rad IX-5 1 variable
+;a IX-4 1 variable
+;s IX-3 3 variable
+;val IX+6 4 parameter
+
+
+; Stack Frame Size: 49 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF ___print_sendstring:ROM
+ XREF __u_reverse:ROM
+ XREF ___print_leading_char:ROM
+ XREF ___print_buff:ROM
+ XREF ___print_fmt:ROM
+ XREF __lcmpu:ROM
+ XREF __ldivu:ROM
+ XREF __lneg:ROM
+ XREF __lremu:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XREF __lcmpzero:ROM
+ XREF __case8:ROM
+ XDEF __u_ltoa
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/uprint.src b/frontends/calculator/CEdev/lib/shared/uprint.src new file mode 100644 index 0000000..2cb1281 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uprint.src @@ -0,0 +1,516 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UPRINT.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 #include <format.h>
+; 2 #include <stddef.h>
+; 3 #include <stdarg.h>
+; 4 #include <string.h>
+; 5 #include <stdlib.h>
+; 6
+; 7 extern struct fmt_type __print_fmt;
+; 8 extern unsigned char __print_len;
+; 9 extern char __print_leading_char; // Initial +, -, or space for number
+; 10 extern char *__print_out;
+; 11
+; 12 extern void (*__print_xputch)(char);
+; 13
+; 14 void __print_sendstring(char *sp);
+; 15 void __print_putch(char ch);
+; 16
+; 17 int _u_print(char *dest, char *fmt, va_list argp) {
+__u_print:
+ LD HL,-14
+ CALL __frameset
+; 18 char *sp;
+; 19 double d;
+; 20
+; 21 __print_len = 0;
+ XOR A,A
+ LD (___print_len),A
+; 22 __print_out = dest;
+ LD BC,(IX+6)
+ LD (___print_out),BC
+; 23 while (*fmt) {
+ JR L_45
+; 24 while (*fmt && *fmt != (char)'%') {
+L_3:
+; 25 __print_putch(*fmt++);
+ LD BC,(IX+9)
+ LD (IX+-11),BC
+ LD BC,(IX+9)
+ INC BC
+ LD (IX+9),BC
+ LD HL,(IX+-11)
+ LD C,(HL)
+ LD B,0
+ PUSH BC
+ CALL ___print_putch
+ POP BC
+; 26 ++__print_len;
+ LD A,(___print_len)
+ INC A
+ LD (___print_len),A
+; 27 }
+L_2:
+ LD HL,(IX+9)
+ LD A,(HL)
+ OR A,A
+ JR NZ,L__1
+ LD A,1
+ JR L__2
+L__1:
+ XOR A,A
+L__2:
+ LD (IX+-4),A
+ OR A,A
+ JR NZ,L_44
+ LD HL,(IX+9)
+ LD A,(HL)
+ CP A,37
+ JR NZ,L_3
+L_44:
+; 28 if (*fmt) { /* we found a % in format string */
+ LD A,(IX+-4)
+ OR A,A
+ JR NZ,L_45
+; 29 fmt = _u_pscan(sp = fmt, &__print_fmt,&argp);
+ LD BC,(IX+9)
+ LD (IX+-3),BC
+ PEA IX+12
+ LD BC,___print_fmt
+ PUSH BC
+ LD BC,(IX+-3)
+ PUSH BC
+ CALL __u_pscan
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+9),HL
+; 30 if (__print_fmt.status == (unsigned char)FMT_ERR) {
+ LD A,(___print_fmt)
+ CP A,1
+ JR Z,L_7
+ JR L_42
+; 31
+; 32 /* error in format string, just dump out from p to fmt */
+; 33
+; 34 for (;sp < fmt;++__print_len,++sp) {
+L_5:
+; 35 __print_putch(*sp++);
+ LD BC,(IX+-3)
+ LD (IX+-14),BC
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+ LD HL,(IX+-14)
+ LD C,(HL)
+ LD B,0
+ PUSH BC
+ CALL ___print_putch
+ POP BC
+ LD A,(___print_len)
+ INC A
+ LD (___print_len),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 36 }
+L_7:
+ LD BC,(IX+9)
+ LD HL,(IX+-3)
+ OR A,A
+ SBC HL,BC
+ JR C,L_5
+; 37 return -1;
+ LD HL,16777215
+ JR L_50
+; 38 } else if (__print_fmt.status == (unsigned char)FMT_PASS_THRU) {
+L_42:
+ LD A,(___print_fmt)
+ CP A,2
+ JR NZ,L_40
+; 39 __print_putch(__print_fmt.chr);
+ LD A,(___print_fmt+3)
+ LD C,A
+ LD B,0
+ PUSH BC
+ CALL ___print_putch
+ POP BC
+; 40 ++__print_len;
+ LD A,(___print_len)
+ INC A
+ LD (___print_len),A
+; 41 } else {
+ JR L_45
+L_40:
+; 42 switch (__print_fmt.type) {
+ LD A,(___print_fmt+4)
+ LD B,A
+ SEXT HL
+ LD L,B
+ CALL __case8
+L__9:
+ DW 15
+ DB 69
+ DW24 L_25
+
+ DB 71
+ DW24 L_27
+
+ DB 88
+ DW24 L_16
+
+ DB 99
+ DW24 L_31
+
+ DB 100
+ DW24 L_9
+
+ DB 101
+ DW24 L_24
+
+ DB 102
+ DW24 L_23
+
+ DB 103
+ DW24 L_26
+
+ DB 105
+ DW24 L_10
+
+ DB 110
+ DW24 L_34
+
+ DB 111
+ DW24 L_18
+
+ DB 112
+ DW24 L_33
+
+ DB 115
+ DW24 L_32
+
+ DB 117
+ DW24 L_17
+
+ DB 120
+ DW24 L_15
+
+ DW24 L_45
+
+; 43 case 'd':
+L_9:
+; 44 case 'i':
+L_10:
+; 45 if (__print_fmt.size == (char)'l' || __print_fmt.size == (char)'L') {
+ LD A,(___print_fmt+2)
+ CP A,108
+ JR Z,L_12
+ LD A,(___print_fmt+2)
+ CP A,76
+ JR NZ,L_13
+L_12:
+; 46 _u_ltoa(va_arg(argp, long));
+ LD IY,(IX+12)
+ LEA BC,IY+6
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LD BC,(IY+-6)
+ LD A,(IY+-3)
+ LD H,0
+ LD L,A
+ PUSH HL
+ PUSH BC
+ CALL __u_ltoa
+ POP BC
+ POP BC
+; 47 } else {
+ JR L_45
+L_13:
+; 48 _u_ltoa((long)va_arg(argp, int));
+ LD IY,(IX+12)
+ LEA BC,IY+3
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LD BC,(IY+-3)
+ CALL __itol
+ LD DE,BC
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL __u_ltoa
+ POP BC
+ POP BC
+; 49 }
+; 50 break;
+ JR L_45
+; 51 case 'x':
+L_15:
+; 52 case 'X':
+L_16:
+; 53 case 'u':
+L_17:
+; 54 case 'o':
+L_18:
+; 55 if (__print_fmt.size == (char)'l' || __print_fmt.size == (char)'L') {
+ LD A,(___print_fmt+2)
+ CP A,108
+ JR Z,L_20
+ LD A,(___print_fmt+2)
+ CP A,76
+ JR NZ,L_21
+L_20:
+; 56 _u_ultoa(va_arg(argp,long));
+ LD IY,(IX+12)
+ LEA BC,IY+6
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LD BC,(IY+-6)
+ LD A,(IY+-3)
+ LD H,0
+ LD L,A
+ PUSH HL
+ PUSH BC
+ CALL __u_ultoa
+ POP BC
+ POP BC
+; 57 } else {
+ JR L_45
+L_21:
+; 58 _u_ultoa((unsigned long)va_arg(argp,unsigned int));
+ LD IY,(IX+12)
+ LEA BC,IY+3
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LD BC,(IY+-3)
+ LD DE,BC
+ XOR A,A
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL __u_ultoa
+ POP BC
+ POP BC
+; 59 }
+; 60 break;
+ JR L_45
+; 61 case 'f':
+L_23:
+; 62 case 'e':
+L_24:
+; 63 case 'E':
+L_25:
+; 64 case 'g':
+L_26:
+; 65 case 'G':
+L_27:
+; 66 d = va_arg(argp,double);
+ LD IY,(IX+12)
+ LEA BC,IY+6
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LEA HL,IY+-6
+ LD BC,(HL)
+ INC HL
+ INC HL
+ INC HL
+ LD A,(HL)
+ LD (IX+-8),BC
+ LD (IX+-5),A
+; 67 if (__print_fmt.type == (char)'g') {
+ LD A,(___print_fmt+4)
+ CP A,103
+ JR NZ,L_29
+; 68 _u_dtog(d);
+ LD C,(IX+-5)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+-8)
+ PUSH BC
+ CALL __u_dtog
+ POP BC
+ POP BC
+; 69 } else {
+ JR L_45
+L_29:
+; 70 _u_dtof(d);
+ LD C,(IX+-5)
+ LD B,0
+ PUSH BC
+ LD BC,(IX+-8)
+ PUSH BC
+ CALL __u_dtof
+ POP BC
+ POP BC
+; 71 }
+; 72 break;
+ JR L_45
+; 73 case 'c':
+L_31:
+; 74 __print_buff[0] = va_arg(argp,int);
+ LD IY,(IX+12)
+ LEA BC,IY+3
+ LD (IX+12),BC
+ LD IY,(IX+12)
+; 75 __print_buff[1] = '\0';
+; 76 __print_sendstring(__print_buff);
+ LD BC,___print_buff
+ PUSH BC
+ LEA HL,IY+-3
+ LD A,(HL)
+ LD (___print_buff),A
+ LD HL,___print_buff
+ INC HL
+ LD (HL),0
+ CALL ___print_sendstring
+ POP BC
+; 77 break;
+ JR L_45
+; 78 case 's':
+L_32:
+; 79 sp = va_arg(argp, char*);
+ LD IY,(IX+12)
+ LEA BC,IY+3
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LEA HL,IY+-3
+ LD BC,(HL)
+ LD (IX+-3),BC
+; 80 __print_sendstring(sp);
+ PUSH BC
+ CALL ___print_sendstring
+ POP BC
+; 81 break;
+ JR L_45
+; 82 case 'p':
+L_33:
+; 83 _u_ultoa((long)va_arg(argp,void*));
+ LD IY,(IX+12)
+ LEA BC,IY+3
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LD BC,(IY+-3)
+ LD DE,BC
+ XOR A,A
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL __u_ultoa
+ POP BC
+ POP BC
+; 84 break;
+ JR L_45
+; 85 case 'n':
+L_34:
+; 86 sp = va_arg(argp, char*);
+ LD IY,(IX+12)
+ LEA BC,IY+3
+ LD (IX+12),BC
+ LD IY,(IX+12)
+ LEA HL,IY+-3
+ LD BC,(HL)
+ LD (IX+-3),BC
+; 87 if (__print_fmt.size == (char)'l' || __print_fmt.size == (char)'L') {
+ LD A,(___print_fmt+2)
+ CP A,108
+ JR Z,L_36
+ LD A,(___print_fmt+2)
+ CP A,76
+ JR NZ,L_37
+L_36:
+; 88 *((long*)sp) = __print_len;
+ UEXT HL
+ LD A,(___print_len)
+ LD L,A
+ LD IY,(IX+-3)
+ LD (IY),HL
+ LD (IY+3),H
+; 89 } else {
+ JR L_45
+L_37:
+; 90 *((int*)sp) = __print_len;
+ LD A,(___print_len)
+ UEXT HL
+ LD L,A
+ LD IY,(IX+-3)
+ LD (IY),HL
+; 91 }
+; 92 break;
+; 93 }
+; 94 }
+; 95 }
+; 96 }
+L_45:
+ LD HL,(IX+9)
+ LD A,(HL)
+ OR A,A
+ JR NZ,L_2
+; 97
+; 98 if (__print_out) {
+ LD HL,(___print_out)
+ CALL __icmpzero
+ JR Z,L_49
+; 99 *__print_out = '\0';
+ LD HL,(___print_out)
+ LD (HL),0
+; 100 }
+L_49:
+; 101 return __print_len;
+ LD A,(___print_len)
+ UEXT HL
+ LD L,A
+; 102 }
+L_50:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_print ***************************
+;Name Addr/Register Size Type
+;___print_sendstring IMPORT ----- function
+;___print_buff IMPORT unknown variable
+;__u_dtof IMPORT ----- function
+;__u_dtog IMPORT ----- function
+;__u_ultoa IMPORT ----- function
+;__u_ltoa IMPORT ----- function
+;___print_fmt IMPORT 19 variable
+;__u_pscan IMPORT ----- function
+;___print_putch IMPORT ----- function
+;___print_out IMPORT 3 variable
+;___print_len IMPORT 1 variable
+;d IX-8 4 variable
+;G_0 IX-4 1 variable
+;sp IX-3 3 variable
+;argp IX+12 3 parameter
+;fmt IX+9 3 parameter
+;dest IX+6 3 parameter
+
+
+; Stack Frame Size: 29 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF ___print_putch:ROM
+ XREF ___print_sendstring:ROM
+ XREF ___print_out:ROM
+ XREF __u_pscan:ROM
+ XREF __u_dtog:ROM
+ XREF __u_dtof:ROM
+ XREF __u_ultoa:ROM
+ XREF __u_ltoa:ROM
+ XREF ___print_len:ROM
+ XREF ___print_buff:ROM
+ XREF ___print_fmt:ROM
+ XREF __itol:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XREF __case8:ROM
+ XDEF __u_print
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/upscan.src b/frontends/calculator/CEdev/lib/shared/upscan.src new file mode 100644 index 0000000..829431f --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/upscan.src @@ -0,0 +1,802 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UPSCAN.C"
+ .assume ADL=1
+ SEGMENT TEXT
+_pscan_fsa:
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 1
+ DB 254
+ DB 254
+ DB 2
+ DB 3
+ DB 6
+ DB 4
+ DB 7
+ DB 8
+ DB 3
+ DB 254
+ DB 2
+ DB 3
+ DB 6
+ DB 4
+ DB 7
+ DB 254
+ DB 3
+ DB 254
+ DB 254
+ DB 3
+ DB 6
+ DB 4
+ DB 7
+ DB 254
+ DB 3
+ DB 254
+ DB 254
+ DB 5
+ DB 254
+ DB 254
+ DB 7
+ DB 254
+ DB 5
+ DB 254
+ DB 254
+ DB 5
+ DB 6
+ DB 254
+ DB 7
+ DB 254
+ DB 5
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 7
+ DB 254
+ DB 254
+ DB 254
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stdarg.h>
+; 7 #include <format.h>
+; 8 #include <ctype.h>
+; 9 #include <string.h>
+; 10
+; 11 #define rom // ez8 keyword
+; 12
+; 13 /* NOTE: */
+; 14 /* This code is duplicated in the optimizer to implement the GENPRINTF */
+; 15 /* feature. If you change this, merge the changes in to the optimizer */
+; 16 /* file genprintf.c too.! */
+; 17
+; 18 /* classes */
+; 19
+; 20 #define FLAGS 0
+; 21 #define DIGIT 1
+; 22 #define SIZE 2
+; 23 #define DOT 3
+; 24 #define TYPES 4
+; 25 #define PERCENT 5
+; 26 #define AST 6
+; 27 #define OTHER 7
+; 28
+; 29 /* actions */
+; 30
+; 31 #define ACC -1
+; 32 #define ERR -2
+; 33
+; 34 #define CR 13
+; 35 #define LF 10
+; 36
+; 37 #define TRUE 1
+; 38 #define FALSE 0
+; 39
+; 40 /*
+; 41 P
+; 42 E
+; 43 F D T R O
+; 44 L I S Y C T
+; 45 A G I D P E A H
+; 46 G I Z O E N S E
+; 47 S T E T S T T R */
+; 48 static rom const char pscan_fsa[9][8] = {
+ SEGMENT CODE
+; 49 /* 0 */ {ERR,ERR,ERR,ERR,ERR, 1,ERR,ERR},
+; 50 /* 1 */ { 2, 3, 6, 4, 7, 8, 3,ERR},
+; 51 /* 2 */ { 2, 3, 6, 4, 7,ERR, 3,ERR},
+; 52 /* 3 */ {ERR, 3, 6, 4, 7,ERR, 3,ERR},
+; 53 /* 4 */ {ERR, 5,ERR,ERR, 7,ERR, 5,ERR},
+; 54 /* 5 */ {ERR, 5, 6,ERR, 7,ERR, 5,ERR},
+; 55 /* 6 */ {ERR,ERR,ERR,ERR, 7,ERR,ERR,ERR},
+; 56 /* 7 */ {ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC},
+; 57 /* 8 */ {ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC},
+; 58 };
+; 59
+; 60 /*************************************************
+; 61 *
+; 62 * _u_pscan - scan a printf format string
+; 63 *
+; 64 * Adopted from funtion of same name in target rtl
+; 65 * pfmt - pointer to format string to parse, advanced to a '%'
+; 66 * - on return is advanced to first char past format spec
+; 67 *
+; 68 * node- pointer to the FCALL node, used for args
+; 69 *
+; 70 * p_argnum - pointer to the index in node->sons[] of the next arg.
+; 71 * (These count downward!)
+; 72
+; 73 *
+; 74 *************************************************/
+; 75 char _PTR_ _u_pscan (char _PTR_ fmt,struct fmt_type _PTR_ str,va_list _PTR_ argp)
+; 76 {
+__u_pscan:
+ LD HL,-11
+ CALL __frameset
+; 77 int pstate;
+; 78 int state = 0;
+ LD BC,0
+ LD (IX+-7),BC
+; 79 int class;
+; 80 char ch;
+; 81 unsigned char precision_given = FALSE;
+ LD (IX+-8),0
+; 82
+; 83 str->flags = 0;
+ LD IY,(IX+9)
+ LD (IY+1),0
+; 84 str->field_width = 0;
+ LD (IY+5),0
+; 85 str->precision = 0;
+ LD (IY+6),0
+; 86 str->size = 0;
+ LD (IY+2),0
+; 87 str->type = '\0';
+ LD (IY+4),0
+; 88
+; 89 for(;;) {
+L_77:
+; 90 ch = *(fmt++);
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD (IX+-1),A
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 91 switch (ch) {
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ CALL __case8
+L__0:
+ DW 35
+ DB 32
+ DW24 L_3
+
+ DB 35
+ DW24 L_4
+
+ DB 37
+ DW24 L_35
+
+ DB 42
+ DW24 L_16
+
+ DB 43
+ DW24 L_2
+
+ DB 45
+ DW24 L_1
+
+ DB 46
+ DW24 L_15
+
+ DB 48
+ DW24 L_5
+
+ DB 49
+ DW24 L_6
+
+ DB 50
+ DW24 L_7
+
+ DB 51
+ DW24 L_8
+
+ DB 52
+ DW24 L_9
+
+ DB 53
+ DW24 L_10
+
+ DB 54
+ DW24 L_11
+
+ DB 55
+ DW24 L_12
+
+ DB 56
+ DW24 L_13
+
+ DB 57
+ DW24 L_14
+
+ DB 69
+ DW24 L_28
+
+ DB 71
+ DW24 L_30
+
+ DB 76
+ DW24 L_19
+
+ DB 88
+ DW24 L_25
+
+ DB 99
+ DW24 L_31
+
+ DB 100
+ DW24 L_20
+
+ DB 101
+ DW24 L_27
+
+ DB 102
+ DW24 L_26
+
+ DB 103
+ DW24 L_29
+
+ DB 104
+ DW24 L_17
+
+ DB 105
+ DW24 L_21
+
+ DB 108
+ DW24 L_18
+
+ DB 110
+ DW24 L_34
+
+ DB 111
+ DW24 L_22
+
+ DB 112
+ DW24 L_33
+
+ DB 115
+ DW24 L_32
+
+ DB 117
+ DW24 L_23
+
+ DB 120
+ DW24 L_24
+
+ DW24 L_36
+
+; 92 case '-':
+L_1:
+; 93 case '+':
+L_2:
+; 94 case ' ':
+L_3:
+; 95 case '#':
+L_4:
+; 96 class = FLAGS;
+ LD BC,0
+ LD (IX+-4),BC
+; 97 break;
+ JR L_37
+; 98 case '0':
+L_5:
+; 99 case '1':
+L_6:
+; 100 case '2':
+L_7:
+; 101 case '3':
+L_8:
+; 102 case '4':
+L_9:
+; 103 case '5':
+L_10:
+; 104 case '6':
+L_11:
+; 105 case '7':
+L_12:
+; 106 case '8':
+L_13:
+; 107 case '9':
+L_14:
+; 108 class = DIGIT;
+ LD BC,1
+ LD (IX+-4),BC
+; 109 break;
+ JR L_37
+; 110 case '.':
+L_15:
+; 111 class = DOT;
+ LD BC,3
+ LD (IX+-4),BC
+; 112 break;
+ JR L_37
+; 113 case '*':
+L_16:
+; 114 class = AST;
+ LD BC,6
+ LD (IX+-4),BC
+; 115 break;
+ JR L_37
+; 116 case 'h':
+L_17:
+; 117 case 'l':
+L_18:
+; 118 case 'L':
+L_19:
+; 119 class = SIZE;
+ LD BC,2
+ LD (IX+-4),BC
+; 120 break;
+ JR L_37
+; 121 case 'd':
+L_20:
+; 122 case 'i':
+L_21:
+; 123 case 'o':
+L_22:
+; 124 case 'u':
+L_23:
+; 125 case 'x':
+L_24:
+; 126 case 'X':
+L_25:
+; 127 case 'f':
+L_26:
+; 128 case 'e':
+L_27:
+; 129 case 'E':
+L_28:
+; 130 case 'g':
+L_29:
+; 131 case 'G':
+L_30:
+; 132 case 'c':
+L_31:
+; 133 case 's':
+L_32:
+; 134 case 'p':
+L_33:
+; 135 case 'n':
+L_34:
+; 136 class = TYPES;
+ LD BC,4
+ LD (IX+-4),BC
+; 137 break;
+ JR L_37
+; 138 case '%':
+L_35:
+; 139 class = PERCENT;
+ LD BC,5
+ LD (IX+-4),BC
+; 140 break;
+ JR L_37
+; 141
+; 142 default:
+L_36:
+; 143 class = OTHER;
+ LD BC,7
+ LD (IX+-4),BC
+; 144 break;
+; 145 }
+L_37:
+; 146
+; 147 pstate = state;
+ LD BC,(IX+-7)
+ LD (IX+-11),BC
+; 148 state = pscan_fsa[state][class];
+ LD HL,(IX+-7)
+ ADD HL,HL
+ ADD HL,HL
+ ADD HL,HL
+ LD BC,_pscan_fsa
+ ADD HL,BC
+ LD BC,(IX+-4)
+ ADD HL,BC
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD (IX+-7),HL
+; 149
+; 150 switch (state) {
+ CALL __case24
+L__1:
+ DW 9
+ DW 2
+ DB 0
+ DW24 L_40
+
+ DW 3
+ DB 0
+ DW24 L_46
+
+ DW 4
+ DB 0
+ DW24 L_53
+
+ DW 5
+ DB 0
+ DW24 L_54
+
+ DW 6
+ DB 0
+ DW24 L_58
+
+ DW 7
+ DB 0
+ DW24 L_59
+
+ DW 8
+ DB 0
+ DW24 L_76
+
+ DW 65534
+ DB 255
+ DW24 L_39
+
+ DW 65535
+ DB 255
+ DW24 L_38
+
+ DW24 L_77
+
+; 151 case ACC:
+L_38:
+; 152 str->status = FMT_OK;
+ LD IY,(IX+9)
+ LD (IY+0),0
+; 153 return(fmt-1);
+ LD IY,(IX+6)
+ LEA HL,IY+-1
+ JR L_79
+; 154 case ERR:
+L_39:
+; 155 str->status = FMT_ERR;
+ LD IY,(IX+9)
+ LD (IY+0),1
+; 156 return(fmt-1);
+ LD IY,(IX+6)
+ LEA HL,IY+-1
+ JR L_79
+; 157
+; 158 case 2:
+L_40:
+; 159 switch (ch) {
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ CALL __case8
+L__2:
+ DW 4
+ DB 32
+ DW24 L_43
+
+ DB 35
+ DW24 L_44
+
+ DB 43
+ DW24 L_42
+
+ DB 45
+ DW24 L_41
+
+ DW24 L_77
+
+; 160
+; 161 case '-':
+L_41:
+; 162 str->flags |= FMT_FLAG_MINUS;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 0,A
+ LD (IY+1),A
+; 163 break;
+ JR L_77
+; 164 case '+':
+L_42:
+; 165 str->flags |= FMT_FLAG_PLUS;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 1,A
+ LD (IY+1),A
+; 166 break;
+ JR L_77
+; 167 case ' ':
+L_43:
+; 168 str->flags |= FMT_FLAG_SPACE;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 2,A
+ LD (IY+1),A
+; 169 break;
+ JR L_77
+; 170 case '#':
+L_44:
+; 171 str->flags |= FMT_FLAG_POUND;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 3,A
+ LD (IY+1),A
+; 172 break;
+ JR L_77
+; 173 }
+; 174 break;
+; 175
+; 176 case 3:
+L_46:
+; 177 if (ch == '*')
+ LD A,(IX+-1)
+ CP A,42
+ JR NZ,L_51
+; 178 str->field_width = va_arg(*argp,int);
+ LD HL,(IX+12)
+ LD IY,(HL)
+ LEA BC,IY+3
+ LD HL,(IX+12)
+ LD (HL),BC
+ LD HL,(IX+12)
+ LD IY,(HL)
+ LD A,(IY+-3)
+ LD IY,(IX+9)
+ LD (IY+5),A
+; 179 else {
+ JR L_77
+L_51:
+; 180 if (pstate != state &&
+ LD BC,(IX+-7)
+ LD HL,(IX+-11)
+ OR A,A
+ SBC HL,BC
+ JR Z,L_49
+; 181 ch == '0')
+ LD A,(IX+-1)
+ CP A,48
+ JR NZ,L_49
+; 182 str->flags |= FMT_FLAG_PAD_ZERO;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 6,A
+ LD (IY+1),A
+L_49:
+; 183 str->field_width = str->field_width * 10 + (ch - '0');
+ LD IY,(IX+9)
+ LD B,(IY+5)
+ LD C,10
+ MLT BC
+ LD A,(IX+-1)
+ ADD A,-48
+ LD B,A
+ LD A,C
+ ADD A,B
+ LD (IY+5),A
+; 184 }
+; 185 break;
+ JR L_77
+; 186 case 4:
+L_53:
+; 187 precision_given = TRUE;
+ LD (IX+-8),1
+; 188 break;
+ JR L_77
+; 189 case 5:
+L_54:
+; 190 if (ch == '*')
+ LD A,(IX+-1)
+ CP A,42
+ JR NZ,L_56
+; 191 str->precision = va_arg(*argp,int);
+ LD HL,(IX+12)
+ LD IY,(HL)
+ LEA BC,IY+3
+ LD HL,(IX+12)
+ LD (HL),BC
+ LD HL,(IX+12)
+ LD IY,(HL)
+ LD A,(IY+-3)
+ LD IY,(IX+9)
+ LD (IY+6),A
+; 192 else
+ JR L_77
+L_56:
+; 193 str->precision = str->precision * 10 + (ch - '0');
+ LD IY,(IX+9)
+ LD B,(IY+6)
+ LD C,10
+ MLT BC
+ LD A,(IX+-1)
+ ADD A,-48
+ LD B,A
+ LD A,C
+ ADD A,B
+ LD (IY+6),A
+; 194 break;
+ JR L_77
+; 195 case 6:
+L_58:
+; 196 str->size = ch;
+ LD A,(IX+-1)
+ LD IY,(IX+9)
+ LD (IY+2),A
+; 197 break;
+ JR L_77
+; 198 case 7:
+L_59:
+; 199 str->type = tolower(ch);
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _tolower
+ POP BC
+ LD IY,(IX+9)
+ LD (IY+4),L
+; 200 if (isupper(ch))
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isupper
+ POP BC
+ CALL __icmpzero
+ JR Z,L_62
+; 201 str->flags |= FMT_FLAG_UPPERCASE;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 5,A
+ LD (IY+1),A
+L_62:
+; 202 if (str->field_width < 0)
+ LD IY,(IX+9)
+ LD A,(IY+5)
+ OR A,A
+ JP P,L_71
+; 203 {
+; 204 str->flags |= FMT_FLAG_MINUS;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 0,A
+ LD (IY+1),A
+; 205 str->field_width = -str->field_width;
+ LD A,(IY+5)
+ NEG
+ LD (IY+5),A
+; 206 }
+L_71:
+; 207 if (!precision_given || str->precision < 0)
+ LD A,(IX+-8)
+ OR A,A
+ JR Z,L_70
+ LD IY,(IX+9)
+ LD A,(IY+6)
+ OR A,A
+ JP P,L_74
+L_70:
+; 208 {
+; 209 if (ch == 'e' ||
+ LD A,(IX+-1)
+ CP A,101
+ JR Z,L_68
+; 210 ch == 'E' ||
+ LD A,(IX+-1)
+ CP A,69
+ JR Z,L_68
+; 211 ch == 'g' ||
+ LD A,(IX+-1)
+ CP A,103
+ JR Z,L_68
+; 212 ch == 'G' ||
+ LD A,(IX+-1)
+ CP A,71
+ JR Z,L_68
+; 213 ch == 'f')
+ LD A,(IX+-1)
+ CP A,102
+ JR NZ,L_69
+L_68:
+; 214 str->precision = DEFAULT_PRECISION;
+ LD IY,(IX+9)
+ LD (IY+6),6
+; 215 else
+ JR L_74
+L_69:
+; 216 str->precision = 0;
+ LD IY,(IX+9)
+ LD (IY+6),0
+; 217 }
+L_74:
+; 218 if (ch == 's' && precision_given)
+ LD A,(IX+-1)
+ CP A,115
+ JR NZ,L_77
+ LD A,(IX+-8)
+ OR A,A
+ JR Z,L_77
+; 219 str->flags |= FMT_FLAG_PRECISION;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 4,A
+ LD (IY+1),A
+; 220 break;
+ JR L_77
+; 221 case 8:
+L_76:
+; 222 str->status = FMT_PASS_THRU;
+ LD IY,(IX+9)
+ LD (IY+0),2
+; 223 str->chr = ch;
+ LD A,(IX+-1)
+ LD (IY+3),A
+; 224 return(fmt);
+ LD HL,(IX+6)
+; 225 }
+; 226 }
+; 227 }
+L_79:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_pscan ***************************
+;Name Addr/Register Size Type
+;_isupper IMPORT ----- function
+;_tolower IMPORT ----- function
+;_pscan_fsa STATIC 72 variable
+;pstate IX-11 3 variable
+;precision_given IX-8 1 variable
+;state IX-7 3 variable
+;class IX-4 3 variable
+;ch IX-1 1 variable
+;argp IX+12 3 parameter
+;str IX+9 3 parameter
+;fmt IX+6 3 parameter
+
+
+; Stack Frame Size: 26 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _tolower:ROM
+ XREF _isupper:ROM
+ XREF __frameset:ROM
+ XREF __icmpzero:ROM
+ XREF __case24:ROM
+ XREF __case8:ROM
+ XDEF __u_pscan
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/ureverse.src b/frontends/calculator/CEdev/lib/shared/ureverse.src new file mode 100644 index 0000000..058a429 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ureverse.src @@ -0,0 +1,112 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UREVERSE.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /************************************************************************/
+; 2 /* */
+; 3 /* Copyright (C)1987-2008 by */
+; 4 /* Zilog, Inc. */
+; 5 /* */
+; 6 /* San Jose, California */
+; 7 /* */
+; 8 /************************************************************************/
+; 9 #include <string.h>
+; 10 #include <format.h>
+; 11
+; 12 /*************************************************
+; 13 *
+; 14 * _u_reverse - reverse a string leaving the end
+; 15 * of string indicator at the end
+; 16 * of the string
+; 17 *
+; 18 * Inputs:
+; 19 * str - string to be reversed
+; 20 *
+; 21 * Returns:
+; 22 * str - string reversed
+; 23 *
+; 24 *************************************************/
+; 25 void _u_reverse(char *s)
+; 26 {
+__u_reverse:
+ LD HL,-16
+ CALL __frameset
+; 27 register char *ss = s;
+ LD BC,(IX+6)
+ LD (IX+-3),BC
+; 28 register size_t len = strlen(s);
+ LD BC,(IX+6)
+ PUSH BC
+ CALL _strlen
+ POP BC
+ LD (IX+-6),HL
+; 29 register char *pp = s + len - 1;
+ LD BC,(IX+6)
+ ADD HL,BC
+ DEC HL
+ LD (IX+-9),HL
+; 30 register char c;
+; 31
+; 32 while (len > 1) {
+ JR L_2
+L_3:
+; 33 c = *pp;
+ LD HL,(IX+-9)
+ LD A,(HL)
+ LD (IX+-10),A
+; 34 *pp-- = *ss;
+ LD BC,(IX+-9)
+ LD (IX+-13),BC
+ LD HL,(IX+-3)
+ LD A,(HL)
+ LD HL,(IX+-13)
+ LD (HL),A
+ LD IY,(IX+-9)
+ LEA BC,IY+-1
+ LD (IX+-9),BC
+; 35 *ss++ = c;
+ LD BC,(IX+-3)
+ LD (IX+-16),BC
+ LD HL,BC
+ LD A,(IX+-10)
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 36 len -= 2;
+ LD IY,(IX+-6)
+ LEA IY,IY+-2
+ LD (IX+-6),IY
+; 37 }
+L_2:
+ LD BC,(IX+-6)
+ LD HL,1
+ OR A,A
+ SBC HL,BC
+ JR C,L_3
+; 38 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_reverse ***************************
+;Name Addr/Register Size Type
+;_strlen IMPORT ----- function
+;c IX-10 1 variable
+;pp IX-9 3 variable
+;len IX-6 3 variable
+;ss IX-3 3 variable
+;s IX+6 3 parameter
+
+
+; Stack Frame Size: 25 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _strlen:ROM
+ XREF __frameset:ROM
+ XDEF __u_reverse
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/usb.src b/frontends/calculator/CEdev/lib/shared/usb.src new file mode 100644 index 0000000..91cc310 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/usb.src @@ -0,0 +1,21 @@ +; --- +; External Definitions +; --- + .def _usb_BusPowered + .def _usb_SelfPowered + .def _usb_ResetChip + .def _usb_DisableTimers + .def _usb_EnableTimers + .def _usb_ResetTimers + .assume adl=1 + +; --- +; Location Equates +; --- +_usb_BusPowered equ 0003E4h +_usb_SelfPowered equ 0003E8h +_usb_ResetChip equ 0003F4h +_usb_DisableTimers equ 0004F4h +_usb_EnableTimers equ 0004F8h +_usb_ResetTimers equ 0004F0h +; --- diff --git a/frontends/calculator/CEdev/lib/shared/uscan.src b/frontends/calculator/CEdev/lib/shared/uscan.src new file mode 100644 index 0000000..793c980 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uscan.src @@ -0,0 +1,1822 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\USCAN.C"
+ .assume ADL=1
+ SEGMENT BSS
+_bptr:
+ DS 3
+_argp:
+ DS 3
+_len:
+ DS 3
+_fields:
+ DS 1
+_fmt_str:
+ DS 19
+_prev_ch:
+ DS 3
+_isunget:
+ DS 1
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 /*************************************************************************
+; 7 * We now assume that the maximum number of fields processed in a format
+; 8 * string is 255. Then, we can fit the field count into a char, for a
+; 9 * slight saving in space and time. <THH>
+; 10 *************************************************************************/
+; 11
+; 12 #include <stdlib.h>
+; 13 #include <stdio.h>
+; 14 #include <stddef.h>
+; 15 #include <ctype.h>
+; 16 #include <stdarg.h>
+; 17 #include <format.h>
+; 18 #include <float.h>
+; 19 #include <string.h>
+; 20
+; 21 /* Sizes allowed for various data */
+; 22 #define FLT_CHARS 127
+; 23 #define PTR_CHARS 127
+; 24 #define INT_CHARS 127
+; 25
+; 26 static char *bptr;
+; 27 static va_list argp;
+; 28 static int len;
+; 29 static unsigned char fields;
+; 30 static struct fmt_type fmt_str;
+; 31 static int prev_ch;
+; 32 static char isunget;
+ SEGMENT CODE
+; 33
+; 34 int getchar(void);
+; 35
+; 36 /****************************************/
+; 37 /* get a character
+; 38 /****************************************/
+; 39 static int get(void)
+; 40 {
+_get:
+ LD HL,-3
+ CALL __frameset
+; 41 ++len;
+ LD BC,(_len)
+ INC BC
+ LD (_len),BC
+; 42 if (bptr)
+ LD HL,(_bptr)
+ CALL __icmpzero
+ JR Z,L_3
+; 43 return(*(bptr++));
+ LD BC,(_bptr)
+ LD (IX+-3),BC
+ LD BC,(_bptr)
+ INC BC
+ LD (_bptr),BC
+ LD HL,(IX+-3)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ JR L_5
+; 44 else if (isunget==1) {
+L_3:
+ LD A,(_isunget)
+ CP A,1
+ JR NZ,L_4
+; 45 isunget = 0;
+ XOR A,A
+ LD (_isunget),A
+; 46 return prev_ch;
+ LD HL,(_prev_ch)
+ JR L_5
+; 47 }
+L_4:
+; 48 return(prev_ch = getchar());
+ CALL _getchar
+ LD (_prev_ch),HL
+; 49 }
+L_5:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _get ***************************
+;Name Addr/Register Size Type
+;_getchar IMPORT ----- function
+;_prev_ch STATIC 3 variable
+;_isunget STATIC 1 variable
+;_bptr STATIC 3 variable
+;_len STATIC 3 variable
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 50
+; 51 /****************************************/
+; 52 /* unget a character
+; 53 /****************************************/
+; 54 static void unget(void) {
+_unget:
+; 55 --len;
+ LD BC,(_len)
+ DEC BC
+ LD (_len),BC
+; 56 isunget = 1;
+ LD A,1
+ LD (_isunget),A
+; 57 if (bptr)
+ LD HL,(_bptr)
+ CALL __icmpzero
+ JR Z,L_7
+; 58 --bptr;
+ LD IY,(_bptr)
+ LEA BC,IY+-1
+ LD (_bptr),BC
+; 59 }
+L_7:
+ RET
+
+
+;**************************** _unget ***************************
+;Name Addr/Register Size Type
+;_bptr STATIC 3 variable
+;_isunget STATIC 1 variable
+;_len STATIC 3 variable
+
+
+; Stack Frame Size: 6 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 60
+; 61 /****************************************/
+; 62 /* Handle pointer conversions
+; 63 /****************************************/
+; 64 static unsigned char pointer(void)
+; 65 {
+_pointer:
+ LD HL,-138
+ CALL __frameset
+; 66 unsigned char i;
+; 67 char ch;
+; 68 char buffer[PTR_CHARS];
+; 69 char *bp = buffer;
+ LD HL,IX
+ LD BC,-135
+ ADD HL,BC
+ LD (IX+-5),HL
+; 70 unsigned int addr;
+; 71
+; 72 if (fmt_str.field_width == 0 || fmt_str.field_width > sizeof(buffer)-1)
+ LD A,(_fmt_str+5)
+ OR A,A
+ JR Z,L_9
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD HL,126
+ OR A,A
+ SBC HL,BC
+ JR NC,L_11
+L_9:
+; 73 fmt_str.field_width = sizeof(buffer)-1;
+ LD A,126
+ LD (_fmt_str+5),A
+L_11:
+; 74 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-2),L
+ LD A,(IX+-2)
+ CP A,-1
+ JR NZ,L_20
+; 75 return FALSE;
+ XOR A,A
+ JR L_28
+L_20:
+; 76 for (i=0;isxdigit(ch);) {
+ LD (IX+-1),0
+ JR L_19
+L_17:
+; 77 *(bp++) = ch;
+ LD BC,(IX+-5)
+ LEA IY,IX+-128
+ LD (IY+-10),BC
+ LD HL,(IY+-10)
+ LD A,(IX+-2)
+ LD (HL),A
+ LD BC,(IX+-5)
+ INC BC
+ LD (IX+-5),BC
+; 78 i++;
+ INC (IX+-1)
+; 79 if (i >= fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-1)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP P,L_22
+; 80 break;
+; 81 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-2),L
+ LD A,(IX+-2)
+ CP A,-1
+ JR NZ,L_19
+; 82 return FALSE;
+ XOR A,A
+ JR L_28
+; 83 }
+L_19:
+ LD A,(IX+-2)
+ SEXT HL
+ LD L,(IX+-2)
+ PUSH HL
+ CALL _isxdigit
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_17
+L_22:
+; 84 if (bp == buffer)
+ LD HL,IX
+ LD BC,-135
+ ADD HL,BC
+ OR A,A
+ LD BC,(IX+-5)
+ SBC HL,BC
+ JR NZ,L_24
+; 85 return FALSE;
+ XOR A,A
+ JR L_28
+L_24:
+; 86 if (i < fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-1)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ CALL __setflag
+ JP P,L_25
+; 87 unget();
+ CALL _unget
+L_25:
+; 88 *bp = '\0';
+ LD IY,(IX+-5)
+; 89 addr = strtoul(buffer,(void *)NULL,16);
+ LD BC,16
+ PUSH BC
+ LD BC,0
+ PUSH BC
+ LD HL,IX
+ LD BC,-135
+ ADD HL,BC
+ LD BC,HL
+ PUSH BC
+ LD (IY),0
+ CALL _strtoul
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+-8),HL
+; 90
+; 91 if (!(fmt_str.flags & FMT_FLAG_IGNORE))
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_27
+; 92 {
+; 93 *(va_arg(argp, int**)) = (int*)addr;
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD HL,(HL)
+ LD BC,(IX+-8)
+ LD (HL),BC
+; 94 ++fields;
+ LD A,(_fields)
+ INC A
+ LD (_fields),A
+; 95 }
+L_27:
+; 96
+; 97 return TRUE;
+ LD A,1
+; 98 }
+L_28:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _pointer ***************************
+;Name Addr/Register Size Type
+;_fields STATIC 1 variable
+;_argp STATIC 3 variable
+;_strtoul IMPORT ----- function
+;_isxdigit IMPORT ----- function
+;_fmt_str STATIC 19 variable
+;buffer IX-135 127 variable
+;addr IX-8 3 variable
+;bp IX-5 3 variable
+;ch IX-2 1 variable
+;i IX-1 1 variable
+
+
+; Stack Frame Size: 144 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 99
+; 100 /****************************************/
+; 101 /* Handle string conversions
+; 102 /****************************************/
+; 103 static unsigned char string(void)
+; 104 {
+_string:
+ LD HL,-8
+ CALL __frameset
+; 105 unsigned char i;
+; 106 char ch;
+; 107 char *p = NULL;
+ LD BC,0
+ LD (IX+-5),BC
+; 108
+; 109 if (!(fmt_str.flags & FMT_FLAG_IGNORE))
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_31
+; 110 p = va_arg(argp, char*);
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD BC,(HL)
+ LD (IX+-5),BC
+L_31:
+; 111 if (fmt_str.field_width == 0)
+ LD A,(_fmt_str+5)
+ OR A,A
+ JR NZ,L_33
+; 112 fmt_str.field_width = 127;
+ LD A,127
+ LD (_fmt_str+5),A
+; 113 do {
+L_33:
+; 114 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_34
+; 115 return FALSE;
+ XOR A,A
+ JR L_55
+; 116 } while (isspace(ch));
+L_34:
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_33
+; 117 unget();
+ CALL _unget
+; 118 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_49
+; 119 return FALSE;
+ XOR A,A
+ JR L_55
+L_49:
+; 120 for (i=0; !isspace(ch) && ch;) {
+ LD (IX+-2),0
+ JR L_48
+L_46:
+; 121 if (p)
+ LD HL,(IX+-5)
+ CALL __icmpzero
+ JR Z,L_42
+; 122 *(p++) = ch;
+ LD BC,(IX+-5)
+ LD (IX+-8),BC
+ LD HL,BC
+ LD A,(IX+-1)
+ LD (HL),A
+ LD BC,(IX+-5)
+ INC BC
+ LD (IX+-5),BC
+L_42:
+; 123 i++;
+ INC (IX+-2)
+; 124 if (i >= fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-2)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP P,L_51
+; 125 break;
+; 126 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_48
+; 127 return FALSE;
+ XOR A,A
+ JR L_55
+; 128 }
+L_48:
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_51
+ LD A,(IX+-1)
+ OR A,A
+ JR NZ,L_46
+L_51:
+; 129 if (i < fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-2)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP P,L_53
+; 130 unget();
+ CALL _unget
+L_53:
+; 131 if (p)
+ LD HL,(IX+-5)
+ CALL __icmpzero
+ JR Z,L_54
+; 132 {
+; 133 *p = '\0';
+ LD HL,(IX+-5)
+ LD (HL),0
+; 134 ++fields;
+ LD A,(_fields)
+ INC A
+ LD (_fields),A
+; 135 }
+L_54:
+; 136 return TRUE;
+ LD A,1
+; 137 }
+L_55:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _string ***************************
+;Name Addr/Register Size Type
+;_fields STATIC 1 variable
+;_isspace IMPORT ----- function
+;_argp STATIC 3 variable
+;_fmt_str STATIC 19 variable
+;p IX-5 3 variable
+;i IX-2 1 variable
+;ch IX-1 1 variable
+
+
+; Stack Frame Size: 14 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 138
+; 139 /****************************************/
+; 140 /* Handle character conversions
+; 141 /****************************************/
+; 142 static unsigned char character(void)
+; 143 {
+_character:
+ LD HL,-8
+ CALL __frameset
+; 144 unsigned char i;
+; 145 char ch;
+; 146 char *p=NULL;
+ LD BC,0
+ LD (IX+-4),BC
+; 147
+; 148 if (!(fmt_str.flags & FMT_FLAG_IGNORE))
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_58
+; 149 p = va_arg(argp,char*);
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD BC,(HL)
+ LD (IX+-4),BC
+L_58:
+; 150 if (fmt_str.field_width == 0)
+ LD A,(_fmt_str+5)
+ OR A,A
+ JR NZ,L_67
+; 151 fmt_str.field_width = 1;
+ LD A,1
+ LD (_fmt_str+5),A
+L_67:
+; 152 for (i=0;i<fmt_str.field_width;++i)
+ LD (IX+-1),0
+ JR L_66
+L_64:
+; 153 {
+; 154 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-5),L
+ LD A,(IX+-5)
+ CP A,-1
+ JR NZ,L_62
+; 155 return FALSE;
+ XOR A,A
+ JR L_69
+L_62:
+; 156 if (p)
+ LD HL,(IX+-4)
+ CALL __icmpzero
+ JR Z,L_63
+; 157 *(p++) = ch;
+ LD BC,(IX+-4)
+ LD (IX+-8),BC
+ LD HL,BC
+ LD A,(IX+-5)
+ LD (HL),A
+ LD BC,(IX+-4)
+ INC BC
+ LD (IX+-4),BC
+L_63:
+; 158 ++fields;
+ LD A,(_fields)
+ INC A
+ LD (_fields),A
+ INC (IX+-1)
+; 159 }
+L_66:
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-1)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP M,L_64
+; 160 return TRUE;
+ LD A,1
+; 161 }
+L_69:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _character ***************************
+;Name Addr/Register Size Type
+;_fields STATIC 1 variable
+;_argp STATIC 3 variable
+;_fmt_str STATIC 19 variable
+;ch IX-5 1 variable
+;p IX-4 3 variable
+;i IX-1 1 variable
+
+
+; Stack Frame Size: 14 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 162
+; 163 /****************************************/
+; 164 /* Floating point conversions
+; 165 /****************************************/
+; 166 static unsigned char fpoint(void)
+; 167 {
+_fpoint:
+ LD HL,-142
+ CALL __frameset
+; 168 unsigned char i;
+; 169 char ch;
+; 170 char buffer[FLT_CHARS];
+; 171 char *bp = buffer;
+ LD HL,IX
+ LD BC,-139
+ ADD HL,BC
+ LD (IX+-5),HL
+; 172 double dval;
+; 173 unsigned char takeEe=TRUE;
+ LD (IX+-8),1
+; 174 unsigned char takeDot=TRUE;
+ LD (IX+-6),1
+; 175 unsigned char takeSign=TRUE;
+ LD (IX+-7),1
+; 176
+; 177 if (fmt_str.field_width == 0 || fmt_str.field_width > sizeof(buffer)-1)
+ LD A,(_fmt_str+5)
+ OR A,A
+ JR Z,L_71
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD HL,126
+ OR A,A
+ SBC HL,BC
+ JR NC,L_73
+L_71:
+; 178 fmt_str.field_width = sizeof(buffer)-1;
+ LD A,126
+ LD (_fmt_str+5),A
+; 179 do {
+L_73:
+; 180 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_74
+; 181 return FALSE;
+ XOR A,A
+ JR L_102
+; 182 } while (isspace(ch));
+L_74:
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_73
+; 183
+; 184 for (i=0; i < fmt_str.field_width; ++i)
+ LD (IX+-2),0
+ JR L_93
+L_91:
+; 185 {
+; 186 if (takeEe && (ch == 'e' || ch == 'E'))
+ LD A,(IX+-8)
+ OR A,A
+ JR Z,L_87
+ LD A,(IX+-1)
+ CP A,101
+ JR Z,L_86
+ LD A,(IX+-1)
+ CP A,69
+ JR NZ,L_87
+L_86:
+; 187 {
+; 188 takeEe = FALSE;
+ LD (IX+-8),0
+; 189 takeSign=TRUE;
+ LD (IX+-7),1
+; 190 takeDot=FALSE;
+ LD (IX+-6),0
+; 191 } else
+ JR L_89
+L_87:
+; 192 if (takeDot && ch=='.')
+ LD A,(IX+-6)
+ OR A,A
+ JR Z,L_85
+ LD A,(IX+-1)
+ CP A,46
+ JR NZ,L_85
+; 193 {
+; 194 takeDot=FALSE;
+ LD (IX+-6),0
+; 195 } else
+ JR L_89
+L_85:
+; 196 if ( (takeSign && (ch == '-' || ch == '+'))
+ LD A,(IX+-7)
+ OR A,A
+ JR Z,L_81
+ LD A,(IX+-1)
+ CP A,45
+ JR Z,L_82
+ LD A,(IX+-1)
+ CP A,43
+ JR Z,L_82
+; 197 || isdigit(ch) )
+L_81:
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isdigit
+ POP BC
+ CALL __icmpzero
+ JR Z,L_96
+L_82:
+; 198 {
+; 199 takeSign = FALSE;
+ LD (IX+-7),0
+; 200 } else
+; 201 {
+; 202 break;
+; 203 }
+L_89:
+; 204 *(bp++) = ch;
+ LD BC,(IX+-5)
+ LEA IY,IX+-128
+ LD (IY+-14),BC
+ LD HL,(IY+-14)
+ LD A,(IX+-1)
+ LD (HL),A
+ LD BC,(IX+-5)
+ INC BC
+ LD (IX+-5),BC
+; 205 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_92
+; 206 return FALSE;
+ XOR A,A
+ JR L_102
+; 207 }
+L_92:
+ INC (IX+-2)
+L_93:
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-2)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP M,L_91
+L_96:
+; 208 if (bp == buffer)
+ LD HL,IX
+ LD BC,-139
+ ADD HL,BC
+ OR A,A
+ LD BC,(IX+-5)
+ SBC HL,BC
+ JR NZ,L_98
+; 209 return(fields);
+ LD A,(_fields)
+ JR L_102
+L_98:
+; 210 if (i < fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-2)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ CALL __setflag
+ JP P,L_99
+; 211 unget();
+ CALL _unget
+L_99:
+; 212 *bp = '\0';
+ LD IY,(IX+-5)
+; 213 dval = strtod(buffer,NULL);
+ LD BC,0
+ PUSH BC
+ LD HL,IX
+ LD BC,-139
+ ADD HL,BC
+ LD BC,HL
+ PUSH BC
+ LD (IY),0
+ CALL _strtod
+ POP BC
+ POP BC
+ LD (IX+-12),HL
+ LD (IX+-9),E
+; 214
+; 215 if (!(fmt_str.flags & FMT_FLAG_IGNORE)) {
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_101
+; 216 *(va_arg(argp, float*)) = dval;
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD HL,(HL)
+ LD BC,(IX+-12)
+ LD A,(IX+-9)
+ LD (HL),BC
+ INC HL
+ INC HL
+ INC HL
+ LD (HL),A
+; 217 ++fields;
+ LD A,(_fields)
+ INC A
+ LD (_fields),A
+; 218 }
+L_101:
+; 219
+; 220 return TRUE;
+ LD A,1
+; 221 }
+L_102:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _fpoint ***************************
+;Name Addr/Register Size Type
+;_argp STATIC 3 variable
+;_strtod IMPORT ----- function
+;_fields STATIC 1 variable
+;_isdigit IMPORT ----- function
+;_isspace IMPORT ----- function
+;_fmt_str STATIC 19 variable
+;buffer IX-139 127 variable
+;dval IX-12 4 variable
+;takeEe IX-8 1 variable
+;takeSign IX-7 1 variable
+;takeDot IX-6 1 variable
+;bp IX-5 3 variable
+;i IX-2 1 variable
+;ch IX-1 1 variable
+
+
+; Stack Frame Size: 148 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 222
+; 223 /****************************************/
+; 224 /* Handle scalar conversions
+; 225 /****************************************/
+; 226 #ifndef _MULTI_THREAD
+; 227 static unsigned char scalar(int radix)
+; 228 #else
+; 229 static unsigned char scalar(va_list argp,int len,unsigned char fields,struct fmt_type fmt_str,int prev_ch,char isunget,int radix)
+; 230 #endif
+; 231 {
+_scalar:
+ LD HL,-139
+ CALL __frameset
+; 232 unsigned char i;
+; 233 char ch;
+; 234 char buffer[INT_CHARS];
+; 235 char *bp = buffer;
+ LD HL,IX
+ LD BC,-136
+ ADD HL,BC
+ LD (IX+-5),HL
+; 236 long val;
+; 237
+; 238 if (fmt_str.field_width == 0 || fmt_str.field_width > sizeof(buffer)-1)
+ LD A,(_fmt_str+5)
+ OR A,A
+ JR Z,L_104
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD HL,126
+ OR A,A
+ SBC HL,BC
+ JR NC,L_106
+L_104:
+; 239 fmt_str.field_width = sizeof(buffer)-1;
+ LD A,126
+ LD (_fmt_str+5),A
+; 240 do {
+L_106:
+; 241 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_107
+; 242 return FALSE;
+ XOR A,A
+ JR L_146
+; 243 } while (isspace(ch));
+L_107:
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_106
+; 244 unget();
+ CALL _unget
+; 245 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_127
+; 246 return FALSE;
+ XOR A,A
+ JR L_146
+L_127:
+; 247 for (i=0;radix == 10 && isdigit(ch) ||
+ LD (IX+-2),0
+ JR L_126
+; 248 radix == 16 && isxdigit(ch) ||
+; 249 radix == 8 && ch >= '0' && ch <= '7' ||
+; 250 ch == '-' ||
+; 251 ch == '+';) {
+L_124:
+; 252 *(bp++) = ch;
+ LD BC,(IX+-5)
+ LEA IY,IX+-128
+ LD (IY+-11),BC
+ LD HL,(IY+-11)
+ LD A,(IX+-1)
+ LD (HL),A
+ LD BC,(IX+-5)
+ INC BC
+ LD (IX+-5),BC
+; 253 i++;
+ INC (IX+-2)
+; 254 if (i >= fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-2)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ JP P,L_129
+; 255 break;
+; 256 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-1),L
+ LD A,(IX+-1)
+ CP A,-1
+ JR NZ,L_126
+; 257 return FALSE;
+ XOR A,A
+ JR L_146
+; 258 }
+L_126:
+ LD BC,10
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_113
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isdigit
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_124
+L_113:
+ LD BC,16
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_116
+ LD A,(IX+-1)
+ SEXT HL
+ LD L,(IX+-1)
+ PUSH HL
+ CALL _isxdigit
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_124
+L_116:
+ LD BC,8
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_117
+ LD A,(IX+-1)
+ CP A,48
+ CALL __setflag
+ JP M,L_117
+ LD A,55
+ CP A,(IX+-1)
+ CALL __setflag
+ JP P,L_124
+L_117:
+ LD A,(IX+-1)
+ CP A,45
+ JR Z,L_124
+ LD A,(IX+-1)
+ CP A,43
+ JR Z,L_124
+L_129:
+; 259 if (bp == buffer)
+ LD HL,IX
+ LD BC,-136
+ ADD HL,BC
+ OR A,A
+ LD BC,(IX+-5)
+ SBC HL,BC
+ JR NZ,L_131
+; 260 return(fields);
+ LD A,(_fields)
+ JR L_146
+L_131:
+; 261 if (i < fmt_str.field_width)
+ LD A,(_fmt_str+5)
+ LD B,A
+ SEXT HL
+ LD L,B
+ LD BC,HL
+ LD A,(IX+-2)
+ UEXT HL
+ LD L,A
+ OR A,A
+ SBC HL,BC
+ CALL __setflag
+ JP P,L_132
+; 262 unget();
+ CALL _unget
+L_132:
+; 263 *bp = '\0';
+ LD HL,(IX+-5)
+ LD (HL),0
+; 264 if ((fmt_str.type == 'u') || (radix == 8) || (radix == 16))
+ LD A,(_fmt_str+4)
+ CP A,117
+ JR Z,L_135
+ LD BC,8
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR Z,L_135
+ LD BC,16
+ LD HL,(IX+6)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_136
+L_135:
+; 265 val = strtoul(buffer,(void*)NULL,radix);
+ LD BC,(IX+6)
+ PUSH BC
+ LD BC,0
+ PUSH BC
+ LD HL,IX
+ LD BC,-136
+ ADD HL,BC
+ LD BC,HL
+ PUSH BC
+ CALL _strtoul
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+-9),HL
+ LD (IX+-6),E
+; 266 else
+ JR L_144
+L_136:
+; 267 val = strtol(buffer,(void*)NULL,radix);
+ LD BC,(IX+6)
+ PUSH BC
+ LD BC,0
+ PUSH BC
+ LD HL,IX
+ LD BC,-136
+ ADD HL,BC
+ LD BC,HL
+ PUSH BC
+ CALL _strtol
+ POP BC
+ POP BC
+ POP BC
+ LD (IX+-9),HL
+ LD (IX+-6),E
+L_144:
+; 268
+; 269 if (!(fmt_str.flags & FMT_FLAG_IGNORE)) {
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_145
+; 270 if (fmt_str.size == 'h')
+ LD A,(_fmt_str+2)
+ CP A,104
+ JR NZ,L_141
+; 271 *(va_arg(argp,short*)) = val;
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD HL,(HL)
+ LD BC,(IX+-9)
+ LD (HL),C
+ INC HL
+ LD (HL),B
+; 272 else if (fmt_str.size == 'l' || fmt_str.size == 'L')
+ JR L_142
+L_141:
+ LD A,(_fmt_str+2)
+ CP A,108
+ JR Z,L_138
+ LD A,(_fmt_str+2)
+ CP A,76
+ JR NZ,L_139
+L_138:
+; 273 *(va_arg(argp,long*)) = val;
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD HL,(HL)
+ LD BC,(IX+-9)
+ LD A,(IX+-6)
+ LD (HL),BC
+ INC HL
+ INC HL
+ INC HL
+ LD (HL),A
+; 274 else
+ JR L_142
+L_139:
+; 275 *(va_arg(argp,int*)) = val;
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD HL,(HL)
+ LD BC,(IX+-9)
+ LD (HL),BC
+L_142:
+; 276 ++fields;
+ LD A,(_fields)
+ INC A
+ LD (_fields),A
+; 277 }
+L_145:
+; 278
+; 279 return TRUE;
+ LD A,1
+; 280 }
+L_146:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _scalar ***************************
+;Name Addr/Register Size Type
+;_argp STATIC 3 variable
+;_strtol IMPORT ----- function
+;_strtoul IMPORT ----- function
+;_fields STATIC 1 variable
+;_isxdigit IMPORT ----- function
+;_isdigit IMPORT ----- function
+;_isspace IMPORT ----- function
+;_fmt_str STATIC 19 variable
+;buffer IX-136 127 variable
+;val IX-9 4 variable
+;bp IX-5 3 variable
+;i IX-2 1 variable
+;ch IX-1 1 variable
+;radix IX+6 3 parameter
+
+
+; Stack Frame Size: 148 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 281
+; 282 /****************************************/
+; 283 /* Handle set conversions
+; 284 /****************************************/
+; 285 static unsigned char set(void)
+; 286 {
+_set:
+ LD HL,-12
+ CALL __frameset
+; 287 char *p2;
+; 288 char neg,ch;
+; 289 char *p = 0;
+ LD BC,0
+ LD (IX+-4),BC
+; 290 char width;
+; 291
+; 292 /* Use (p == 0) to signal the case that we are skipping this input
+; 293 string. <THH> */
+; 294 if (!(fmt_str.flags & FMT_FLAG_IGNORE))
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_150
+; 295 p = va_arg(argp,char*);
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD BC,(HL)
+ LD (IX+-4),BC
+L_150:
+; 296
+; 297 if (neg = (*fmt_str.set_begin == '^'))
+ LD HL,(_fmt_str+7)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,94
+ SBC HL,BC
+ JR NZ,L__81
+ LD A,1
+ JR L__82
+L__81:
+ XOR A,A
+L__82:
+ LD (IX+-9),A
+ OR A,A
+ JR Z,L_151
+; 298 fmt_str.set_begin++;
+ LD BC,(_fmt_str+7)
+ INC BC
+ LD (_fmt_str+7),BC
+L_151:
+; 299
+; 300 width = fmt_str.field_width;
+ LD A,(_fmt_str+5)
+ LD (IX+-1),A
+; 301 if (width == 0)
+ OR A,A
+ JR NZ,L_169
+; 302 width = 127;
+ LD (IX+-1),127
+; 303
+; 304 while (width--)
+ JR L_169
+L_170:
+; 305 {
+; 306 if ((ch = get()) == EOF)
+ CALL _get
+ LD (IX+-8),L
+ LD A,(IX+-8)
+ CP A,-1
+ JR NZ,L_159
+; 307 return FALSE;
+ XOR A,A
+ JR L_177
+L_159:
+; 308
+; 309 /* Look for a match in the set. */
+; 310 for(p2 = fmt_str.set_begin; p2 < fmt_str.set_end; ++p2)
+ LD BC,(_fmt_str+7)
+ LD (IX+-7),BC
+ JR L_158
+L_156:
+; 311 if (*p2 == ch)
+ LD HL,(IX+-7)
+ LD A,(HL)
+ CP A,(IX+-8)
+ JR Z,L_165
+ LD BC,(IX+-7)
+ INC BC
+ LD (IX+-7),BC
+; 312 break; /* Matched one in the set. */
+L_158:
+ LD BC,(_fmt_str+10)
+ LD HL,(IX+-7)
+ OR A,A
+ SBC HL,BC
+ JR C,L_156
+L_165:
+; 313
+; 314 if (p2 < fmt_str.set_end && *p2 == ch)
+ LD BC,(_fmt_str+10)
+ LD HL,(IX+-7)
+ OR A,A
+ SBC HL,BC
+ JR NC,L_164
+ LD HL,(IX+-7)
+ LD A,(HL)
+ CP A,(IX+-8)
+ JR NZ,L_164
+; 315 {
+; 316 /* We stop scanning if we match a character in the negative set. */
+; 317 if (neg)
+ LD A,(IX+-9)
+ OR A,A
+ JR NZ,L_173
+ JR L_168
+; 318 break;
+; 319 }
+; 320 else
+L_164:
+; 321 {
+; 322 /* Likewise, we stop scanning if we fail to match a character in
+; 323 the positive set. */
+; 324 if (!neg)
+ LD A,(IX+-9)
+ OR A,A
+ JR Z,L_173
+; 325 break;
+; 326 }
+L_168:
+; 327
+; 328 /* Store the valid character. <THH> */
+; 329 if (p)
+ LD HL,(IX+-4)
+ CALL __icmpzero
+ JR Z,L_169
+; 330 *(p++) = ch;
+ LD BC,(IX+-4)
+ LD (IX+-12),BC
+ LD HL,BC
+ LD A,(IX+-8)
+ LD (HL),A
+ LD BC,(IX+-4)
+ INC BC
+ LD (IX+-4),BC
+; 331 }
+L_169:
+ LD A,(IX+-1)
+ DEC (IX+-1)
+ OR A,A
+ JR NZ,L_170
+L_173:
+; 332
+; 333 if (width > 0)
+ XOR A,A
+ CP A,(IX+-1)
+ JP P,L_175
+; 334 unget();
+ CALL _unget
+L_175:
+; 335
+; 336 if (p)
+ LD HL,(IX+-4)
+ CALL __icmpzero
+ JR Z,L_176
+; 337 *p = '\0';
+ LD HL,(IX+-4)
+ LD (HL),0
+L_176:
+; 338
+; 339 return TRUE;
+ LD A,1
+; 340 }
+L_177:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _set ***************************
+;Name Addr/Register Size Type
+;_argp STATIC 3 variable
+;_fmt_str STATIC 19 variable
+;neg IX-9 1 variable
+;ch IX-8 1 variable
+;p2 IX-7 3 variable
+;p IX-4 3 variable
+;width IX-1 1 variable
+
+
+; Stack Frame Size: 18 (bytes)
+; Spill Code: 0 (instruction)
+
+
+; 341
+; 342 /*************************************************
+; 343 *
+; 344 * _u_scan - scan formated string from a file or string
+; 345 *
+; 346 * Inputs:
+; 347 * src - NULL = input from keyboard, else input from string
+; 348 * fmt - format string
+; 349 * argp - argument list pointer
+; 350 *
+; 351 * Returns:
+; 352 * Number of characters transmitted, or
+; 353 * -1 if an error occured.
+; 354 *
+; 355 *************************************************/
+; 356 int _u_scan(char *src,char *fmt,va_list ap)
+; 357 {
+__u_scan:
+ LD HL,-7
+ CALL __frameset
+; 358 int i;
+; 359 int ch;
+; 360 unsigned char ok=TRUE;
+ LD (IX+-1),1
+; 361
+; 362 argp = ap;
+ LD BC,(IX+12)
+ LD (_argp),BC
+; 363 fields = 0;
+ XOR A,A
+ LD (_fields),A
+; 364 len = 0;
+ LD BC,0
+ LD (_len),BC
+; 365 prev_ch = 0;
+ LD (_prev_ch),BC
+; 366 isunget = 0;
+ XOR A,A
+ LD (_isunget),A
+; 367 bptr = NULL;
+ LD (_bptr),BC
+; 368
+; 369 if (src)
+ LD HL,(IX+6)
+ CALL __icmpzero
+ JR Z,L_215
+; 370 bptr = src;
+ LD BC,(IX+6)
+ LD (_bptr),BC
+; 371
+; 372 while ( ok && prev_ch!=EOF && *fmt) {
+ JR L_215
+L_216:
+; 373 fmt = _u_sscan(fmt,&fmt_str);
+ LD BC,_fmt_str
+ PUSH BC
+ LD BC,(IX+9)
+ PUSH BC
+ CALL __u_sscan
+ POP BC
+ POP BC
+ LD (IX+9),HL
+; 374 if (fmt_str.status == FMT_ERR)
+ LD A,(_fmt_str)
+ CP A,1
+ JR NZ,L_214
+; 375 return(fields);
+ LD A,(_fields)
+ UEXT HL
+ LD L,A
+ JR L_222
+; 376 else if (fmt_str.status == FMT_PASS_THRU) {
+L_214:
+ LD A,(_fmt_str)
+ CP A,2
+ JR NZ,L_212
+; 377 if (isspace(fmt_str.chr))
+ LD A,(_fmt_str+3)
+ LD B,A
+ SEXT HL
+ LD L,B
+ PUSH HL
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR Z,L_187
+; 378 {
+; 379 do ch=get();
+L_181:
+ CALL _get
+ LD (IX+-4),HL
+; 380 while(isspace(ch));
+ LD BC,HL
+ PUSH BC
+ CALL _isspace
+ POP BC
+ CALL __icmpzero
+ JR NZ,L_181
+; 381 unget();
+ CALL _unget
+; 382 } else
+ JR L_215
+L_187:
+; 383 {
+; 384 ch = get();
+ CALL _get
+ LD (IX+-4),HL
+; 385 if (ch && ch != fmt_str.chr)
+ CALL __icmpzero
+ JR Z,L_215
+ LD A,(_fmt_str+3)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,(IX+-4)
+ SBC HL,BC
+ JR NZ,L_220
+ JR L_215
+; 386 break;
+; 387 }
+; 388 }
+; 389 else if (fmt_str.flags & FMT_FLAG_SET) {
+L_212:
+ LD A,(_fmt_str+1)
+ AND A,128
+ JR Z,L_210
+; 390 ok = set();
+ CALL _set
+ LD (IX+-1),A
+; 391 }
+; 392 else {
+ JR L_215
+L_210:
+; 393 switch (fmt_str.type) {
+ LD A,(_fmt_str+4)
+ LD B,A
+ SEXT HL
+ LD L,B
+ CALL __case8
+L__105:
+ DW 18
+ DB 65
+ DW24 L_195
+
+ DB 69
+ DW24 L_196
+
+ DB 70
+ DW24 L_197
+
+ DB 71
+ DW24 L_198
+
+ DB 88
+ DW24 L_193
+
+ DB 97
+ DW24 L_199
+
+ DB 99
+ DW24 L_203
+
+ DB 100
+ DW24 L_188
+
+ DB 101
+ DW24 L_200
+
+ DB 102
+ DW24 L_201
+
+ DB 103
+ DW24 L_202
+
+ DB 105
+ DW24 L_189
+
+ DB 110
+ DW24 L_206
+
+ DB 111
+ DW24 L_194
+
+ DB 112
+ DW24 L_205
+
+ DB 115
+ DW24 L_204
+
+ DB 117
+ DW24 L_190
+
+ DB 120
+ DW24 L_192
+
+ DW24 L_215
+
+; 394 register int radix;
+; 395 case 'd':
+L_188:
+; 396 case 'i':
+L_189:
+; 397 case 'u':
+L_190:
+; 398 radix=10;
+ LD BC,10
+ LD (IX+-7),BC
+; 399 goto _sclr;
+ JR L_191
+; 400 case 'x':
+L_192:
+; 401 case 'X':
+L_193:
+; 402 radix=16;
+ LD BC,16
+ LD (IX+-7),BC
+; 403 goto _sclr;
+ JR L_191
+; 404 case 'o':
+L_194:
+; 405 radix=8;
+ LD BC,8
+ LD (IX+-7),BC
+L_191:
+; 406 _sclr:
+; 407 ok = scalar(radix);
+ LD BC,(IX+-7)
+ PUSH BC
+ CALL _scalar
+ POP BC
+ LD (IX+-1),A
+; 408
+; 409 break;
+ JR L_215
+; 410 case 'A':
+L_195:
+; 411 case 'E':
+L_196:
+; 412 case 'F':
+L_197:
+; 413 case 'G':
+L_198:
+; 414 case 'a':
+L_199:
+; 415 case 'e':
+L_200:
+; 416 case 'f':
+L_201:
+; 417 case 'g':
+L_202:
+; 418 ok = fpoint();
+ CALL _fpoint
+ LD (IX+-1),A
+; 419 break;
+ JR L_215
+; 420 case 'c':
+L_203:
+; 421 ok = character();
+ CALL _character
+ LD (IX+-1),A
+; 422 break;
+ JR L_215
+; 423 case 's':
+L_204:
+; 424 ok = string();
+ CALL _string
+ LD (IX+-1),A
+; 425 break;
+ JR L_215
+; 426 case 'p':
+L_205:
+; 427 ok = pointer();
+ CALL _pointer
+ LD (IX+-1),A
+; 428 break;
+ JR L_215
+; 429 case 'n':
+L_206:
+; 430 if (!(fmt_str.flags & FMT_FLAG_IGNORE)) {
+ LD A,(_fmt_str+1)
+ AND A,16
+ JR NZ,L_215
+; 431 *(va_arg(argp,int*)) = len;
+ LD IY,(_argp)
+ LEA BC,IY+3
+ LD (_argp),BC
+ LD IY,(_argp)
+ LEA HL,IY+-3
+ LD HL,(HL)
+ LD BC,(_len)
+ LD (HL),BC
+; 432 ++fields;
+ LD A,(_fields)
+ INC A
+ LD (_fields),A
+; 433 }
+; 434 break;
+; 435 }
+; 436 }
+; 437 }
+L_215:
+ LD A,(IX+-1)
+ OR A,A
+ JR Z,L_220
+ LD BC,16777215
+ LD HL,(_prev_ch)
+ OR A,A
+ SBC HL,BC
+ JR Z,L_220
+ LD HL,(IX+9)
+ LD A,(HL)
+ OR A,A
+ JR NZ,L_216
+L_220:
+; 438 // ISO Spec: Return EOF if an input error occurs before any conversion.
+; 439 // Otherwise return the number of input items assigned.
+; 440 // A sucessfull passthrough counts as a conversion, so we look at len,
+; 441 // which will be 1 for a unsucessfull call to get on the first try.
+; 442 if (prev_ch == EOF && len<=1)
+ LD BC,16777215
+ LD HL,(_prev_ch)
+ OR A,A
+ SBC HL,BC
+ JR NZ,L_221
+ LD BC,(_len)
+ LD HL,1
+ OR A,A
+ SBC HL,BC
+ JP M,L_221
+; 443 return EOF;
+ LD HL,16777215
+ JR L_222
+L_221:
+; 444 return fields;
+ LD A,(_fields)
+ UEXT HL
+ LD L,A
+; 445 }
+L_222:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_scan ***************************
+;Name Addr/Register Size Type
+;_isspace IMPORT ----- function
+;_fmt_str STATIC 19 variable
+;__u_sscan IMPORT ----- function
+;_bptr STATIC 3 variable
+;_isunget STATIC 1 variable
+;_prev_ch STATIC 3 variable
+;_len STATIC 3 variable
+;_fields STATIC 1 variable
+;_argp STATIC 3 variable
+;radix IX-7 3 variable
+;ch IX-4 3 variable
+;ok IX-1 1 variable
+;ap IX+12 3 parameter
+;fmt IX+9 3 parameter
+;src IX+6 3 parameter
+
+
+; Stack Frame Size: 22 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF _getchar:ROM
+ XREF _isxdigit:ROM
+ XREF _isspace:ROM
+ XREF _isdigit:ROM
+ XREF __u_sscan:ROM
+ XREF _strtoul:ROM
+ XREF _strtol:ROM
+ XREF _strtod:ROM
+ XREF __frameset:ROM
+ XREF __setflag:ROM
+ XREF __icmpzero:ROM
+ XREF __case8:ROM
+ XDEF __u_scan
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/usscan.src b/frontends/calculator/CEdev/lib/shared/usscan.src new file mode 100644 index 0000000..ab1a994 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/usscan.src @@ -0,0 +1,630 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\USSCAN.C"
+ .assume ADL=1
+ SEGMENT DATA
+_sscan_fsa:
+ DB 2
+ DB 0
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 1
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 8
+ DB 254
+ DB 3
+ DB 5
+ DB 4
+ DB 9
+ DB 6
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 5
+ DB 4
+ DB 9
+ DB 6
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 5
+ DB 4
+ DB 9
+ DB 6
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 254
+ DB 9
+ DB 6
+ DB 254
+ DB 254
+ DB 6
+ DB 6
+ DB 6
+ DB 6
+ DB 6
+ DB 6
+ DB 6
+ DB 7
+ DB 6
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+ DB 255
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <format.h>
+; 7 #include <stddef.h>
+; 8 #include <stdarg.h>
+; 9
+; 10 /* actions */
+; 11
+; 12 #define ACC -1
+; 13 #define ERR -2
+; 14
+; 15 #define CR 13
+; 16 #define LF 10
+; 17
+; 18 /* +-{0..9}
+; 19 {sp,tab,nl}{h,l,L}| +-{d,i,o,u,x,e,f,g,s,c,p,n}
+; 20 | | | | {others}
+; 21 % | * | | | [ ] |
+; 22 +-----------------------------------+ */
+; 23 static char sscan_fsa[10][9] = {
+ SEGMENT CODE
+; 24 /* 0 */ { 2, 0, 1, 1, 1, 1, 1, 1, 1},
+; 25 /* 1 */ {ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC},
+; 26 /* 2 */ { 8,ERR, 3, 5, 4, 9, 6,ERR,ERR},
+; 27 /* 3 */ {ERR,ERR,ERR, 5, 4, 9, 6,ERR,ERR},
+; 28 /* 4 */ {ERR,ERR,ERR, 5, 4, 9, 6,ERR,ERR},
+; 29 /* 5 */ {ERR,ERR,ERR,ERR,ERR, 9, 6,ERR,ERR},
+; 30 /* 6 */ { 6, 6, 6, 6, 6, 6, 6, 7, 6},
+; 31 /* 7 */ {ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC},
+; 32 /* 8 */ {ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC},
+; 33 /* 9 */ {ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC,ACC},
+; 34 };
+; 35
+; 36 /*************************************************
+; 37 *
+; 38 * _u_sscan - scan a scanf format string
+; 39 *
+; 40 * Inputs:
+; 41 * fmt - pointer to format string
+; 42 * str - pointer to fmt_type structure
+; 43 * where the results are put
+; 44 *
+; 45 * Returns:
+; 46 * new pointer to format string
+; 47 *
+; 48 *************************************************/
+; 49 char *_u_sscan(char *fmt, struct fmt_type *str) {
+__u_sscan:
+ LD HL,-7
+ CALL __frameset
+; 50 char pstate;
+; 51 char state = 0;
+ LD (IX+-2),0
+; 52 unsigned char class;
+; 53 char ch;
+; 54
+; 55 str->flags = 0;
+ LD IY,(IX+9)
+ LD (IY+1),0
+; 56 str->field_width = 0;
+ LD (IY+5),0
+; 57 str->precision = 0;
+ LD (IY+6),0
+; 58 str->size = 0;
+ LD (IY+2),0
+; 59 str->type = '\0';
+ LD (IY+4),0
+; 60
+; 61 for (;;) {
+L_55:
+; 62 ch = *(fmt++);
+ LD BC,(IX+6)
+ LD (IX+-7),BC
+ LD HL,BC
+ LD A,(HL)
+ LD (IX+-3),A
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 63 switch(ch) {
+ LD A,(IX+-3)
+ SEXT HL
+ LD L,(IX+-3)
+ CALL __case8
+L__0:
+ DW 35
+ DB 37
+ DW24 L_1
+
+ DB 42
+ DW24 L_2
+
+ DB 48
+ DW24 L_6
+
+ DB 49
+ DW24 L_7
+
+ DB 50
+ DW24 L_8
+
+ DB 51
+ DW24 L_9
+
+ DB 52
+ DW24 L_10
+
+ DB 53
+ DW24 L_11
+
+ DB 54
+ DW24 L_12
+
+ DB 55
+ DW24 L_13
+
+ DB 56
+ DW24 L_14
+
+ DB 57
+ DW24 L_15
+
+ DB 65
+ DW24 L_16
+
+ DB 69
+ DW24 L_17
+
+ DB 70
+ DW24 L_18
+
+ DB 71
+ DW24 L_19
+
+ DB 76
+ DW24 L_5
+
+ DB 88
+ DW24 L_20
+
+ DB 91
+ DW24 L_34
+
+ DB 93
+ DW24 L_35
+
+ DB 97
+ DW24 L_21
+
+ DB 99
+ DW24 L_22
+
+ DB 100
+ DW24 L_23
+
+ DB 101
+ DW24 L_24
+
+ DB 102
+ DW24 L_25
+
+ DB 103
+ DW24 L_26
+
+ DB 104
+ DW24 L_3
+
+ DB 105
+ DW24 L_27
+
+ DB 108
+ DW24 L_4
+
+ DB 110
+ DW24 L_28
+
+ DB 111
+ DW24 L_29
+
+ DB 112
+ DW24 L_30
+
+ DB 115
+ DW24 L_31
+
+ DB 117
+ DW24 L_32
+
+ DB 120
+ DW24 L_33
+
+ DW24 L_36
+
+; 64 case '%':
+L_1:
+; 65 class = 0;
+ LD (IX+-1),0
+; 66 break;
+ JR L_37
+; 67 /***** Treat these as pass through:
+; 68 case ' ':
+; 69 case '\t':
+; 70 case '\n':
+; 71 class = 1;
+; 72 break;
+; 73 ****/
+; 74 case '*':
+L_2:
+; 75 class = 2;
+ LD (IX+-1),2
+; 76 break;
+ JR L_37
+; 77 case 'h':
+L_3:
+; 78 case 'l':
+L_4:
+; 79 case 'L':
+L_5:
+; 80 class = 3;
+ LD (IX+-1),3
+; 81 break;
+ JR L_37
+; 82 case '0':
+L_6:
+; 83 case '1':
+L_7:
+; 84 case '2':
+L_8:
+; 85 case '3':
+L_9:
+; 86 case '4':
+L_10:
+; 87 case '5':
+L_11:
+; 88 case '6':
+L_12:
+; 89 case '7':
+L_13:
+; 90 case '8':
+L_14:
+; 91 case '9':
+L_15:
+; 92 class = 4;
+ LD (IX+-1),4
+; 93 break;
+ JR L_37
+; 94 case 'A':
+L_16:
+; 95 case 'E':
+L_17:
+; 96 case 'F':
+L_18:
+; 97 case 'G':
+L_19:
+; 98 case 'X':
+L_20:
+; 99 case 'a':
+L_21:
+; 100 case 'c':
+L_22:
+; 101 case 'd':
+L_23:
+; 102 case 'e':
+L_24:
+; 103 case 'f':
+L_25:
+; 104 case 'g':
+L_26:
+; 105 case 'i':
+L_27:
+; 106 case 'n':
+L_28:
+; 107 case 'o':
+L_29:
+; 108 case 'p':
+L_30:
+; 109 case 's':
+L_31:
+; 110 case 'u':
+L_32:
+; 111 case 'x':
+L_33:
+; 112 class = 5;
+ LD (IX+-1),5
+; 113 break;
+ JR L_37
+; 114 case '[':
+L_34:
+; 115 class = 6;
+ LD (IX+-1),6
+; 116 break;
+ JR L_37
+; 117 case ']':
+L_35:
+; 118 class = 7;
+ LD (IX+-1),7
+; 119 break;
+ JR L_37
+; 120 default:
+L_36:
+; 121 class = 8;
+ LD (IX+-1),8
+; 122 }
+L_37:
+; 123
+; 124 pstate = state;
+ LD A,(IX+-2)
+ LD (IX+-4),A
+; 125 state = sscan_fsa[state][class];
+ LD A,(IX+-2)
+ SEXT HL
+ LD L,(IX+-2)
+ LD A,9
+ CALL __imul_b
+ LD A,(IX+-1)
+ LD BC,_sscan_fsa
+ ADD HL,BC
+ LD BC,HL
+ UEXT HL
+ LD L,A
+ ADD HL,BC
+ LD A,(HL)
+ LD (IX+-2),A
+; 126
+; 127 switch (state) {
+ SEXT HL
+ LD L,(IX+-2)
+ CALL __case24
+L__1:
+ DW 10
+ DW 1
+ DB 0
+ DW24 L_40
+
+ DW 3
+ DB 0
+ DW24 L_42
+
+ DW 4
+ DB 0
+ DW24 L_43
+
+ DW 5
+ DB 0
+ DW24 L_44
+
+ DW 6
+ DB 0
+ DW24 L_45
+
+ DW 7
+ DB 0
+ DW24 L_53
+
+ DW 8
+ DB 0
+ DW24 L_41
+
+ DW 9
+ DB 0
+ DW24 L_54
+
+ DW 65534
+ DB 255
+ DW24 L_39
+
+ DW 65535
+ DB 255
+ DW24 L_38
+
+ DW24 L_55
+
+; 128 case ACC:
+L_38:
+; 129 str->status = FMT_OK;
+ LD IY,(IX+9)
+ LD (IY+0),0
+; 130 return(fmt-1);
+ LD IY,(IX+6)
+ LEA HL,IY+-1
+ JR L_57
+; 131 case ERR:
+L_39:
+; 132 str->status = FMT_ERR;
+ LD IY,(IX+9)
+ LD (IY+0),1
+; 133 return(fmt-1);
+ LD IY,(IX+6)
+ LEA HL,IY+-1
+ JR L_57
+; 134 case 1:
+L_40:
+; 135 case 8:
+L_41:
+; 136 str->status = FMT_PASS_THRU;
+ LD IY,(IX+9)
+ LD (IY+0),2
+; 137 str->chr = ch;
+ LD A,(IX+-3)
+ LD (IY+3),A
+; 138 return(fmt);
+ LD HL,(IX+6)
+ JR L_57
+; 139 case 3:
+L_42:
+; 140 str->flags |= FMT_FLAG_IGNORE;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 4,A
+ LD (IY+1),A
+; 141 break;
+ JR L_55
+; 142 case 4:
+L_43:
+; 143 str->field_width = str->field_width * 10 + (ch - '0');
+ LD IY,(IX+9)
+ LD B,(IY+5)
+ LD C,10
+ MLT BC
+ LD A,(IX+-3)
+ ADD A,-48
+ LD B,A
+ LD A,C
+ ADD A,B
+ LD (IY+5),A
+; 144 break;
+ JR L_55
+; 145 case 5:
+L_44:
+; 146 str->size = ch;
+ LD A,(IX+-3)
+ LD IY,(IX+9)
+ LD (IY+2),A
+; 147 break;
+ JR L_55
+; 148 case 6:
+L_45:
+; 149 if (pstate != state) {
+ LD A,(IX+-4)
+ CP A,(IX+-2)
+ JR Z,L_55
+; 150 str->flags |= FMT_FLAG_SET;
+ LD IY,(IX+9)
+ LD A,(IY+1)
+ SET 7,A
+ LD (IY+1),A
+; 151 str->set_begin = fmt;
+ LD BC,(IX+6)
+ LD (IY+7),BC
+; 152 // Check for sets that start with [] or [^]
+; 153 if (*fmt == '^')
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,94
+ SBC HL,BC
+ JR NZ,L_50
+; 154 fmt++;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+L_50:
+; 155 if (*fmt == ']')
+ LD HL,(IX+6)
+ LD A,(HL)
+ LD B,A
+ SEXT HL
+ LD L,B
+ OR A,A
+ LD BC,93
+ SBC HL,BC
+ JR NZ,L_55
+; 156 fmt++;
+ LD BC,(IX+6)
+ INC BC
+ LD (IX+6),BC
+; 157
+; 158 }
+; 159 break;
+ JR L_55
+; 160 case 7:
+L_53:
+; 161 str->set_end = fmt-1;
+ LD IY,(IX+6)
+ LEA BC,IY+-1
+ LD IY,(IX+9)
+ LD (IY+10),BC
+; 162 break;
+ JR L_55
+; 163 case 9:
+L_54:
+; 164 str->type = ch;
+ LD A,(IX+-3)
+ LD IY,(IX+9)
+ LD (IY+4),A
+; 165 break;
+ JR L_55
+; 166 }
+; 167 }
+; 168 }
+L_57:
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_sscan ***************************
+;Name Addr/Register Size Type
+;_sscan_fsa STATIC 90 variable
+;pstate IX-4 1 variable
+;ch IX-3 1 variable
+;state IX-2 1 variable
+;class IX-1 1 variable
+;str IX+9 3 parameter
+;fmt IX+6 3 parameter
+
+
+; Stack Frame Size: 19 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __frameset:ROM
+ XREF __case24:ROM
+ XREF __case8:ROM
+ XREF __imul_b:ROM
+ XDEF __u_sscan
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/ustoa.src b/frontends/calculator/CEdev/lib/shared/ustoa.src new file mode 100644 index 0000000..792c27a --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/ustoa.src @@ -0,0 +1,71 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\USTOA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 #ifndef _PTR_
+; 10 #define _PTR_ *
+; 11 #endif
+; 12
+; 13 /*************************************************
+; 14 *
+; 15 * _u_stoa - convert a short to a number of base rad
+; 16 *
+; 17 * Inputs:
+; 18 * int - int to be converted
+; 19 * str - target char array
+; 20 * rad - radix
+; 21 * fmt - format structure with conversion info
+; 22 *
+; 23 * Returns:
+; 24 * next address past the end of the string
+; 25 *
+; 26 *************************************************/
+; 27 #ifndef _MULTI_THREAD
+; 28 void _u_stoa(short n)
+; 29 {
+__u_stoa:
+ CALL __frameset0
+; 30 _u_ltoa((long)n);
+ LD A,(IX+7)
+ RLA
+ SBC A,A
+ LD BC,(IX+6)
+ CALL __stoi
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH HL
+ CALL __u_ltoa
+ POP BC
+ POP BC
+; 31 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_stoa ***************************
+;Name Addr/Register Size Type
+;__u_ltoa IMPORT ----- function
+;n IX+6 2 parameter
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __u_ltoa:ROM
+ XREF __stoi:ROM
+ XREF __frameset0:ROM
+ XDEF __u_stoa
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/uuitoa.src b/frontends/calculator/CEdev/lib/shared/uuitoa.src new file mode 100644 index 0000000..79a7db4 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uuitoa.src @@ -0,0 +1,64 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UUITOA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 /*************************************************
+; 10 *
+; 11 * _u_uitoa - convert an unsigned int to a number of base rad
+; 12 *
+; 13 * Inputs:
+; 14 * int - int to be converted
+; 15 * str - target char array
+; 16 * rad - radix
+; 17 * fmt - format structure with conversion info
+; 18 *
+; 19 * Returns:
+; 20 * next address past the end of the string
+; 21 *
+; 22 *************************************************/
+; 23 #ifndef _MULTI_THREAD
+; 24 void _u_uitoa(unsigned int n)
+; 25 {
+__u_uitoa:
+ CALL __frameset0
+; 26 _u_ultoa((unsigned long)n);
+ LD BC,(IX+6)
+ LD DE,BC
+ XOR A,A
+ LD C,A
+ LD B,0
+ PUSH BC
+ PUSH DE
+ CALL __u_ultoa
+ POP BC
+ POP BC
+; 27 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_uitoa ***************************
+;Name Addr/Register Size Type
+;__u_ultoa IMPORT ----- function
+;n IX+6 3 parameter
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __u_ultoa:ROM
+ XREF __frameset0:ROM
+ XDEF __u_uitoa
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/uultoa.src b/frontends/calculator/CEdev/lib/shared/uultoa.src new file mode 100644 index 0000000..e86e130 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uultoa.src @@ -0,0 +1,326 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UULTOA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 #ifndef _PTR_
+; 10 #define _PTR_ *
+; 11 #endif
+; 12
+; 13 /*************************************************
+; 14 *
+; 15 * _u_ultoa - convert an unsigned long to a number
+; 16 * of base rad
+; 17 *
+; 18 * Inputs:
+; 19 * ulg - unsigned long to be converted
+; 20 * str - target char array
+; 21 * rad - radix
+; 22 * fmt - format structure with conversion info
+; 23 *
+; 24 * Returns:
+; 25 * next address past the end of the string
+; 26 *
+; 27 *************************************************/
+; 28
+; 29 void __print_sendstring(char *sp);
+; 30
+; 31 #ifndef _MULTI_THREAD
+; 32 void _u_ultoa(unsigned long n)
+; 33 #else
+; 34 void _mt_ultoa(unsigned long n,char* __print_buff,struct fmt_type* print_fmt)
+; 35 #define __print_fmt (*print_fmt)
+; 36 #endif
+; 37 {
+__u_ultoa:
+ LD HL,-22
+ CALL __frameset
+; 38 unsigned char a;
+; 39 unsigned char t;
+; 40 char _PTR_ s = __print_buff;
+ LD BC,___print_buff
+ LD (IX+-3),BC
+; 41 unsigned char nz = (n != 0);
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __lcmpzero
+ JR Z,L__1
+ LD A,1
+ JR L__2
+L__1:
+ XOR A,A
+L__2:
+ LD (IX+-7),A
+; 42 char rad;
+; 43
+; 44 a = 'A';
+ LD (IX+-5),65
+; 45 switch (__print_fmt.type)
+ LD A,(___print_fmt+4)
+ LD B,A
+ SEXT HL
+ LD L,B
+ CALL __case8
+L__3:
+ DW 7
+ DB 88
+ DW24 L_8
+
+ DB 100
+ DW24 L_1
+
+ DB 105
+ DW24 L_2
+
+ DB 111
+ DW24 L_4
+
+ DB 112
+ DW24 L_6
+
+ DB 117
+ DW24 L_3
+
+ DB 120
+ DW24 L_5
+
+ DW24 L_0
+
+; 46 {
+; 47 default:
+L_0:
+; 48 case 'd':
+L_1:
+; 49 case 'i':
+L_2:
+; 50 case 'u':
+L_3:
+; 51 rad = 10;
+ LD (IX+-4),10
+; 52 break;
+ JR L_14
+; 53 case 'o':
+L_4:
+; 54 rad = 8;
+ LD (IX+-4),8
+; 55 break;
+ JR L_14
+; 56 case 'x':
+L_5:
+; 57 case 'p':
+L_6:
+; 58 if ( !(__print_fmt.flags&FMT_FLAG_UPPERCASE))
+ LD A,(___print_fmt+1)
+ AND A,32
+ JR NZ,L_8
+; 59 a = 'a';
+ LD (IX+-5),97
+; 60 // Fall into next case
+; 61 case 'X':
+L_8:
+; 62 rad = 16;
+ LD (IX+-4),16
+; 63 break;
+; 64 }
+; 65
+; 66 do
+L_14:
+; 67 { /* generate digits in reverse order */
+; 68 t = n % (unsigned char)rad;
+ UEXT HL
+ LD L,(IX+-4)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __lremu
+ LD BC,HL
+ LD (IX+-6),C
+; 69 if (t > 9)
+ LD A,9
+ CP A,(IX+-6)
+ JR NC,L_13
+; 70 *(s++) = (t - (unsigned char)10) + a;
+ LD BC,(IX+-3)
+ LD (IX+-10),BC
+ LD A,(IX+-6)
+ ADD A,-10
+ ADD A,(IX+-5)
+ LD HL,BC
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 71 else
+ JR L_15
+L_13:
+; 72 *(s++) = t + (unsigned char)'0';
+ LD BC,(IX+-3)
+ LD (IX+-13),BC
+ LD A,(IX+-6)
+ ADD A,48
+ LD HL,BC
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 73 } while (n /= rad);
+L_15:
+ LD A,(IX+-4)
+ SEXT HL
+ LD L,(IX+-4)
+ LD BC,HL
+ LD A,H
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __ldivu
+ LD (IX+6),HL
+ LD (IX+9),E
+ LD HL,(IX+6)
+ LD E,(IX+9)
+ CALL __lcmpzero
+ JR NZ,L_14
+; 74
+; 75 while (s - __print_buff < (unsigned char) __print_fmt.precision) {
+ JR L_18
+L_19:
+; 76 *(s++) = '0';
+ LD BC,(IX+-3)
+ LD (IX+-16),BC
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 77 }
+L_18:
+ LD A,(___print_fmt+6)
+ UEXT HL
+ LD L,A
+ LD DE,HL
+ LD HL,(IX+-3)
+ OR A,A
+ LD BC,___print_buff
+ SBC HL,BC
+ OR A,A
+ SBC HL,DE
+ JP M,L_19
+; 78 if (__print_fmt.flags & FMT_FLAG_POUND) {
+ LD A,(___print_fmt+1)
+ AND A,8
+ JR Z,L_31
+; 79 if (nz) {
+ LD A,(IX+-7)
+ OR A,A
+ JR Z,L_31
+; 80 if (rad == (char)16) {
+ LD A,(IX+-4)
+ CP A,16
+ JR NZ,L_26
+; 81 *(s++) = ('X'-'A')+a;
+ LD BC,(IX+-3)
+ LD (IX+-19),BC
+ LD A,(IX+-5)
+ ADD A,23
+ LD HL,BC
+ LD (HL),A
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 82 *(s++) = '0';
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 83 }
+; 84 else if (rad == (char)8) {
+ JR L_31
+L_26:
+ LD A,(IX+-4)
+ CP A,8
+ JR NZ,L_31
+; 85 *(s++) = '0';
+ LD BC,(IX+-3)
+ LD (IX+-22),BC
+ LD HL,BC
+ LD (HL),48
+ LD BC,(IX+-3)
+ INC BC
+ LD (IX+-3),BC
+; 86 }
+; 87 }
+; 88 }
+L_31:
+; 89
+; 90 // ISO Spec: If a precision is specified the zero flag is ignored
+; 91 if (__print_fmt.precision )
+ LD A,(___print_fmt+6)
+ OR A,A
+ JR Z,L_32
+; 92 __print_fmt.flags &= ~FMT_FLAG_PAD_ZERO;
+ LD A,(___print_fmt+1)
+ RES 6,A
+ LD (___print_fmt+1),A
+L_32:
+; 93
+; 94 *s = '\0';
+ LD HL,(IX+-3)
+; 95
+; 96 _u_reverse(__print_buff);
+ LD BC,___print_buff
+ PUSH BC
+ LD (HL),0
+ CALL __u_reverse
+ POP BC
+; 97 #ifndef _MULTI_THREAD
+; 98 __print_sendstring(__print_buff);
+ LD BC,___print_buff
+ PUSH BC
+ CALL ___print_sendstring
+ POP BC
+; 99 #endif
+; 100 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_ultoa ***************************
+;Name Addr/Register Size Type
+;___print_sendstring IMPORT ----- function
+;__u_reverse IMPORT ----- function
+;___print_fmt IMPORT 19 variable
+;___print_buff IMPORT unknown variable
+;nz IX-7 1 variable
+;t IX-6 1 variable
+;a IX-5 1 variable
+;rad IX-4 1 variable
+;s IX-3 3 variable
+;n IX+6 4 parameter
+
+
+; Stack Frame Size: 34 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF ___print_sendstring:ROM
+ XREF __u_reverse:ROM
+ XREF ___print_buff:ROM
+ XREF ___print_fmt:ROM
+ XREF __ldivu:ROM
+ XREF __lremu:ROM
+ XREF __frameset:ROM
+ XREF __lcmpzero:ROM
+ XREF __case8:ROM
+ XDEF __u_ultoa
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/uustoa.src b/frontends/calculator/CEdev/lib/shared/uustoa.src new file mode 100644 index 0000000..18041e9 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/uustoa.src @@ -0,0 +1,64 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\UUSTOA.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5
+; 6 #include <stddef.h>
+; 7 #include <format.h>
+; 8
+; 9 /*************************************************
+; 10 *
+; 11 * _u_ustoa - convert an unsigned short to a number of base rad
+; 12 *
+; 13 * Inputs:
+; 14 * int - int to be converted
+; 15 * str - target char array
+; 16 * rad - radix
+; 17 * fmt - format structure with conversion info
+; 18 *
+; 19 * Returns:
+; 20 * next address past the end of the string
+; 21 *
+; 22 *************************************************/
+; 23 #ifndef _MULTI_THREAD
+; 24 void _u_ustoa(unsigned short n)
+; 25 {
+__u_ustoa:
+ CALL __frameset0
+; 26 _u_ultoa((unsigned long)n);
+ LD BC,(IX+6)
+ CALL __stoiu
+ LD C,0
+ LD B,0
+ PUSH BC
+ PUSH HL
+ CALL __u_ultoa
+ POP BC
+ POP BC
+; 27 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** __u_ustoa ***************************
+;Name Addr/Register Size Type
+;__u_ultoa IMPORT ----- function
+;n IX+6 2 parameter
+
+
+; Stack Frame Size: 9 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __u_ultoa:ROM
+ XREF __stoiu:ROM
+ XREF __frameset0:ROM
+ XDEF __u_ustoa
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/vsprintf.src b/frontends/calculator/CEdev/lib/shared/vsprintf.src new file mode 100644 index 0000000..d940239 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/vsprintf.src @@ -0,0 +1,64 @@ +; Zilog eZ80 ANSI C Compiler Release 3.4
+; -optsize -nomodsect -peephole -globalopt -localcse
+; -const=ROM
+ FILE "..\VSPRINTF.C"
+ .assume ADL=1
+ SEGMENT CODE
+; 1 /*************************************************
+; 2 * Copyright (C) 1999-2008 by Zilog, Inc.
+; 3 * All Rights Reserved
+; 4 *************************************************/
+; 5 #include <format.h>
+; 6 #include <stdio.h>
+; 7 #include <stdarg.h>
+; 8
+; 9 /*************************************************
+; 10 *
+; 11 * vsprintf - print to a string (variable args)
+; 12 *
+; 13 * Inputs:
+; 14 * string - pointer to string to write to
+; 15 * fmt - format string
+; 16 * args - argument list
+; 17 *
+; 18 * Returns:
+; 19 * Number of characters transmitted, or
+; 20 * -1 if an error occured.
+; 21 *
+; 22 *************************************************/
+; 23 int vsprintf(char *string,char *fmt,va_list args) {
+_vsprintf:
+ CALL __frameset0
+; 24 return(_u_print(string, fmt, args));
+ LD BC,(IX+12)
+ PUSH BC
+ LD BC,(IX+9)
+ PUSH BC
+ LD BC,(IX+6)
+ PUSH BC
+ CALL __u_print
+ POP BC
+ POP BC
+ POP BC
+; 25 }
+ LD SP,IX
+ POP IX
+ RET
+
+
+;**************************** _vsprintf ***************************
+;Name Addr/Register Size Type
+;__u_print IMPORT ----- function
+;args IX+12 3 parameter
+;fmt IX+9 3 parameter
+;string IX+6 3 parameter
+
+
+; Stack Frame Size: 15 (bytes)
+; Spill Code: 0 (instruction)
+
+
+ XREF __u_print:ROM
+ XREF __frameset0:ROM
+ XDEF _vsprintf
+ END
diff --git a/frontends/calculator/CEdev/lib/shared/zx7_Decompress.src b/frontends/calculator/CEdev/lib/shared/zx7_Decompress.src new file mode 100644 index 0000000..e45c146 --- /dev/null +++ b/frontends/calculator/CEdev/lib/shared/zx7_Decompress.src @@ -0,0 +1,117 @@ +; --- +; void zx7_Decompress(void *dest, void *src) +; --- +; Dec 2012 by Einar Saukas & Urusergi +; "Turbo" version (89 bytes, 25% faster) +; --- + + .def _zx7_Decompress + .assume adl=1 + +; enter : hl = void *src +; de = void *dst +; +; exit : hl = & following uncompressed block +; +; uses : af, bc, de, hl + +_zx7_Decompress: + pop bc + pop de + pop hl + push hl + push de + push bc + + ld a, 128 + +zx7t_copy_byte_loop: + + ldi ; copy literal byte + +zx7t_main_loop: + + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + jr nc, zx7t_copy_byte_loop ; next bit indicates either literal or sequence + +; determine number of bits used for length (Elias gamma coding) + + push de + ld de, 0 + ld bc, 1 + +zx7t_len_size_loop: + + inc d + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + jr nc, zx7t_len_size_loop + jp zx7t_len_value_start + +; determine length + +zx7t_len_value_loop: + + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + rl c + rl b + jr c, zx7t_exit ; check end marker + +zx7t_len_value_start: + + dec d + jr nz, zx7t_len_value_loop + inc bc ; adjust length + +; determine offset + + ld e, (hl) ; load offset flag (1 bit) + offset value (7 bits) + inc hl + + sla e + inc e + + jr nc, zx7t_offset_end ; if offset flag is set, load 4 extra bits + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + rl d ; insert first bit into D + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + rl d ; insert second bit into D + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + rl d ; insert third bit into D + add a, a ; check next bit + call z, zx7t_load_bits ; no more bits left? + ccf + jr c, zx7t_offset_end + inc d ; equivalent to adding 128 to DE + +zx7t_offset_end: + + rr e ; insert inverted fourth bit into E + +; copy previous sequence + + ex (sp), hl ; store source, restore destination + push hl ; store destination + sbc hl, de ; HL = destination - offset - 1 + pop de ; DE = destination + ldir + +zx7t_exit: + + pop hl ; restore source address (compressed data) + jp nc, zx7t_main_loop + +zx7t_load_bits: + + ld a, (hl) ; load another group of 8 bits + inc hl + rla + ret + + + end |