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; (c) Copyright 2007-2008 Zilog, Inc.
;-------------------------------------------------------------------------
; Signed Byte Multiply
; Input:
; Operand1:
; A : 8 bit
;
; Operand2:
; B : 8 bit
;
; Output:
; Result: A : 8 bit product
; Registers Used:
; none
;-------------------------------------------------------------------------
.def __bmuls
.assume adl=1
__bmuls:
push bc
ld c,a
mlt bc
ld a,c
pop bc
ret
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