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; (c) Copyright 2004-2008 Zilog, Inc.
;-------------------------------------------------------------------------
; fract short Multiplication signed.
;
; Input:
; Operand1:
; HL : 16 bits
;
; Operand2:
; BC : 16 bits
;
; Output:
; Result: HL : 16 bits
; Registers Used:
; none
;-------------------------------------------------------------------------
.assume adl=1
.def __frsmuls
.ref __frsmulu
__frsmuls:
push af
push de
push bc
push hl
;;
;; Check sign info
;;
add.s hl,hl
jr nc,_L0
ex de,hl
or a,a
sbc hl,hl
sbc hl,de
_L0:
rl c
rl b
jr nc,_L1
ex de,hl
or a,a
sbc hl,hl
sbc hl,bc
ld b,h
ld c,l
ex de,hl
_L1:
call __frsmulu
srl h
rr l
pop af
pop bc
xor a,b
jp p,_L2
ex de,hl
sbc hl,hl
sbc hl,de
_L2:
pop de
pop af
ret
|